At OCP 2020, Xilinx will demonstrate our how our compute, networking and storage platforms are powering the evolution of real-time computing.
Please visit us in Booth B12.
|OpenCompute Accelerator Module (OAM)||
Xilinx will be showing a Proof of Concept OpenCompute Accelerator Module (OAM) that leverages an UltraScale+ VU37P FPGA with 8GB of HBM memory and supports seven 25Gbps x8 links to enable rich inter-module system topologies.
|Compute Acceleration with Alveo™||
This demo will showcase appliances for machine learning and optimized AI inferences running on a Wistron Transformer G2 server with Alveo™ U50 cards.
In this demo, we will show the server hypervisor virtual switching function offloaded and accelerated on an FPGA-based SmartNIC. We will show how this greatly reduces the server CPU burden and reclaims resources that can be monetized to run more applications. At the same time, we will show how the data bottleneck to the server is opened up, since the SmartNIC can process data at much higher throughput.
|Virtual Switching Offload on FPGA-Based SmartNICs||
Server virtualization is driving ever-increasing workloads into the server hypervisor to support functions such as virtual switching. This leads directly to the robbing of CPU resources from cloud-based applications and also creates a data bottleneck to the server. As network port speeds grow from 25 to 50, 100, and soon 200GbE per server, this problem is becoming exponentially worse.
In this demo, we will showcase how Caltrans created a dashboard map to analyze Bay Area traffic intensity using Bigstream Hyper-Acceleration layer to achieve seamless acceleration of Parquet queries up to 3X with zero code changes.
|Real-time Analytics & Business Intelligence on SmartSSD™ Drives||
Finding the Goldilocks Zone in Data Center Networking
Date/Time: Wednesday, March 4 @ 2:05pm – 2:20pm
Location: Expo Hall Stage
Presenter: Nick Tausanovitch, Director of Systems Architecture - Data Center Marketing
Software Defined Networking has transformed Data Center Networking in several profound ways. First, it has broken down traditional boundaries of where functionality exists across network elements. Second, it has vastly increased the functional richness and diversity of features available to data center operators. And third, it has made possible for the first time the development and deployment of new networking features at the speed of software.
But this transformation has also brought about massive technical challenges and unanswered questions. What is the most optimal way to partition networking functionality across switches, NICs, and Server CPUs? When and where does it make sense to apply acceleration techniques? What types of acceleration technologies provide the best performance while maintaining the flexibility and development agility required by SDN?
In case you haven’t noticed, many players in the networking industry have set out to tackle some of these difficult problems. This is creating a renaissance in domain specific networking architectures. In this session we will present Xilinx’s vision regarding this important new trend and explain how FPGA technology will play an important and critical role.
New Era of Software-Defined Networking and Storage Infrastructure
Date/Time: Wednesday, March 4 @ 3:30pm – 3:55pm
Location: 210B/F - Executive Track 2
Presenter: Jamon Bowen, Product Marketing Director, Xilinx
Software Defined Networking and computational storage is transforming Data Center infrastructure in several profound ways. As compute migrates out to the NIC and where the data lives in storage, a whole new set of domain specific architectures are being created and deployed. In this session we will present Xilinx’s vision regarding this important new trend and explain how FPGA technology will play an important and critical role.
OAI-OAM Panel Discussions
Date/Time: Wednesday, March 4 @ 4:00pm – 5:00pm
Location: LL20 A
Presenter: Paul Hartke, Director, Xilinx
Xilinx will participate on the panel of experts to discuss planned OAM solutions, opportunities, and challenges of enabling interoperable, open-source products within OAI to meet the needs of emerging accelerators for HPC and AI.
For more information, please click here.