UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

Flash Memory Summit 2018

At FMS 2018, Xilinx will be showcasing next-generation reconfigurable storage acceleration solutions. Join us at the show for a first-hand look and to connect with Xilinx technology experts.

Booth Highlights

During Exhibit Hours | Xilinx Booth
The following showcases and demos will be featured throughout the show in the Xilinx booth #313.

Xilinx Booth Demonstrations

Micron NVDIMM-N solution
The demo showcases a Micron 16GB JEDEC standard NVDIMM-N module solution which fits in a standard server DIMM slot. NVDIMM-N modules are natively supported in the BIOS, and in the Linux kernel. A Xilinx FPGA with the AgigaTech IP and FW+ implements the DIMM Controller, power-fail circuits and other adaptable intelligence in this NVDIMM-N module. NVDIMM-N modules enable a persistent store at DRAM speeds – when power fails, these modules backup volatile data into NAND flash.When power is restored, the backed up data is automatically restored back into the DRAM.Tables, caches, metadata and journaling logs can all be stored “persistently” across power failures. This resilience not only boosts the performance of applications, but also dramatically simplifies the software stack for applications: in-memory databases, traditional databases, object stores and caching/tiering all benefit NVDIMM-N persistent memory.

Database Acceleration on FPGAs
The SDAccel platform provides a powerful, general-purpose API interface enabling a broad set of usecases across compute, storage and networking applications. This demo showcases one specific use case for SDAccel: TPC-H query6 database acceleration. Database and log analytics applications require the ingestion of terabytes of data to produce query results. This demo showcases that offloading database primitives such as query-6 can dramatically reduce the amount of data that needs to be sent to the CPU-DRAM complex. A key new feature, PCIe Peer-2-Peer capability, is the secret sauce that enables transferring data directly between NVMe-SSDs and FPGA Accelerators, to completely eliminate CPU-memory complex from the data ingestion path. We show a benefit of 10X higher performance using query-6 offload and peer-2-peer techniques. 

Storage Compression Offload using Eideticom NoLoad™ and NVM Express® Peer to Peer processing
Eideticom NoLoad 250-U2 FPGA Accelerator utilizes an NVMe compliant interface and supports Peer to Peer (P2P) transfers of PCIe data via Controller Memory Buffers (CMBs). The AMD EPYC processor enables P2P PCIe data transfers to and from a NoLoad 250-U.2 Xilinx-enabled FPGA card. The NoLoad storage and analytics accelerator performs compute functions including compression and processes the data to adjacent SSD’s with minimal host CPU intervention.

Programmable Controller for Software-defined Flash
Burlywood TrueFlash™ software is the heart of the industry's first modular flash controller architecture designed specifically for hyperscale datacenters and AFA/HCI systems. Our patented approach provides the flexibility necessary to unleash the potential of today’s cloud applications by allowing the user to custom-tune their flash to perfectly match any workload while providing significant cost savings. By supporting all storage formats, any protocol, and current or future non-volatile memory, Burlywood provides organizations with full storage solutions that have the flexibility to match cloud storage workloads and pace with today’s rapidly evolving cloud storage environment. Built on Xilinx UltraScale™ FPGAs, Burlywood’s TrueFlash software-defined Flash takes advantage of the power, performance, and cost improvements of Xilinx devices while allowing customers to quickly optimize solutions for the Flash and their applications.

Xilinx Ecosystem Demonstrations on FMS Show Floor

Xilinx Ecosystem Booth No.
Aupera Technologies 951
Codelucida 856
EpoStar 815
Everspin Technologies 319
Gen-Z Consortium 739
IntelliProp, Inc. 821
IP-Maker 710
Mobiveil 610
Nallatech, a Molex Company 844
OpenCAPI Consortium 832
PLDA 826
ScaleFlux 113
Smart IOPS 609
SMART Modular Technologies 627
Symbyon Systems 850

Booth Information

Xilinx Booth #313
Santa Clara Convention Center
Santa Clara, CA

Tuesday, August 7
4:00 PM – 7:00 PM

Wednesday, August 8
12:00 PM – 7:00 PM

Thursday, August 9
10:00 AM – 2:30 PM

Learn more

Conference Participation

Xilinx Conference Participation
Xilinx experts will be participating in the following product showcases.

Keynote by Manish Muthal, Vice President Data Center Marketing
Adaptable Storage Acceleration Platforms for Exabyte-scale Data Centers.

The emergence of cloud computing has radically transformed almost every major industry. Exponential growth of compute requirements within cloud computing environments is now driving the need for heterogenous computing architectures, which rely on accelerators to deliver power efficient scaling of compute performance. Further compounding the computing challenges is the dawn of AI and the explosion in the sheer amount of data that needs to be stored and processed.

A new class of storage acceleration platforms are needed to enable tomorrow’s exabyte-scale datacenters. The rapid deployment of high performance NVMe and persistent memory architectures will accelerate the adoption of such storage acceleration platforms. A key element in achieving performance scalability will be to move the acceleration closer to the data, so it becomes part of the storage subsystem and can scale with storage capacity. These accelerators will need to be easy to deploy and manage, and highly adaptable to the ever changing workloads within cloud environments.

This keynote will focus on emerging server and storage architectures where compute acceleration is moved closer to data, thus providing the foundation for emerging and next generation cloud datacenters.
Date: Wednesday August 8 l 1:00 PM – 1:30PM
Location: Mission City Ballroom

Xilinx Employee Talks
Enabling Smart NVMe-Based Storage Solutions with FPGAs
NVMe and NVMe-over-fabrics today offer ultra low latency and high performance storage transfers, greatly reducing how long CPUs have to wait for them to occur.  However, that puts the pressure on CPUs to keep up!  FPGAs can help by offloading specific tasks.  They can accelerate storage algorithms, speeding up tasks such as aggregation or on-demand storage, or perform much of the protocol overhead, speeding up transfers.  FPGAs provide highly adaptable platforms that can improve performance for a wide variety of use cases and workloads.  They work at hardware speed, avoid the need for complex software, and can be reprogrammed to handle changes in protocols, architectures, devices, and connections.  The results are smart, scalable, and configurable system solutions that can take full advantage of the capabilities of NVMe drives.

Presenter: Deboleena Minz Sakalley, Principal Engineer, Xilinx
Date: Thursday, August 9 l 8:30AM - 10:50AM

Adding FPGA-based Acceleration to Flash Memory for Real-Time Analytics
Ever larger datasets (big data) is leading to tremendous performance requirements for real-time analytics.  Even PCI-connected flash memory simply isn’t fast enough.  One solution is to add an integrated FPGA-based accelerator between the host and the storage.  It can move data and perform many basic operations in hardware, and offload much of the overhead from the PCIe connection.  Experiments show that this approach increases overall performance by up to 10-25X for many database applications.

Presenter : HK Verma, Principal Engineer, Xilinx
Date: Thursday, August 9 l 8:30AM - 10:50AM

Accelerating Image Processing for Object Storage
Xilinx customer, CTAccel, is developing FPGA based image processing solutions for the Datacenter. The talk will start with a discussion of the real world problems that CTAccel is solving in the datacenter. We will then describe the solution architecture required to increase the performance and efficiency of image processing. Finally we'll share real world results and customer impact for the CTAccel Image processing (CIP) service.

Presenter: Sean Gardner, Sr. Product Marketing Manager, Xilinx
Date: Tuesday, August 7 l 8:30AM-10:50AM

 

Page Bookmarked