Through close collaboration with technology and manufacturing partner Taiwan Semiconductor Manufacturing Company (TSMC), Xilinx has been able to deliver a product portfolio that provides a 3 – 5X system level performance and integration value advantages that places Xilinx a generation ahead of our competition.
At 28nm we worked closely with TSMC to develop a high-κ metal gate (HKMG), high-performance, low-power 28nm process technology for FPGAs. This new 28nm process technology was built upon the achievements of 40nm FPGA process development and introduced a new HKMG technology to maximize usable system performance through lower power.
When we embarked upon the design of our current generation UltraScale™ architecture, we continued our close collaboration with TSMC to ensure we derived the maximum advantages of TSMC’s leading edge 20nm SoC and 16nm FinFET processes. Through our collaboration we are able to extend our current industry leadership delivering industry breakthroughs in system performance, power, and integration that address the performance, power, and integration needs of the industry’s most demanding applications.
UltraScale was architected to scale from 20nm planar, through 16nm FinFET technologies and beyond, and from monolithic through a new generation of 3D ICs. The result is a product portfolio that delivers ASIC class performance, power, and integration that is a Generation Ahead of the competition.
Multiple product families with breakthroughs in integration and optimization change the game in price/performance/watt and enable systems integration. With a broad portfolio of FPGAs, SoCs and 3D ICs, you are empowered to maximize system performance, lower power, and reduce BOM costs, while preserving design flexibility across a wide range of markets and applications.
The UltraScale architecture addresses the challenges associated with managing multi-hundred gigabit-per-second levels of system performance with smart processing at full line rate, scaling to terabits and teraflops by applying leading-edge ASIC techniques in an architecture. This architecture scales from 20nm planar through 16nm FinFET technologies and beyond, while also scaling from monolithic through 3D ICs. The UltraScale architecture not only addresses the limitations to scalability of total system throughput and latency, but directly addresses interconnect - the number one bottleneck to system performance at advanced nodes.
Xilinx’s UltraScale portfolio, which includes the FPGAs and 2nd generation of 3D ICs and SoCs, builds upon the breakthroughs that were proven at 28nm to provide an extra generation of system performance, lower power and system integration. Co-optimized with Xilinx’s Vivado Design Suite for the highest productivity and quality of results, the UltraScale portfolio addresses a wide range of next generation systems and provides the most compelling alternative ever to ASICs and ASSPs.
The UltraScale™ MPSoC Architecture, built on TSMC’s 16nm FinFET process technology, enables next generation Zynq® UltraScale MPSoCs. This new architecture provides processor scalability from 32 to 64 bits with support for virtualization, the combination of soft and hard engines for real time control, and graphics/video processing, waveform and packet processing, next generation interconnect and memory, advanced power management, and technology enhancements that deliver multi-level security, safety and reliability. These new architectural elements are coupled with the Vivado® Design Suite and abstract design environments to greatly simplify programming and increase productivity.