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  • Program Tier: Certified

IntelliProp Inc.

  • Program Member Since: 2008
  • Certified Engineers: 7
    • Longmont, CO, US (Headquarters)

Partner Information

IntelliProp has a core belief that system domain knowledge and verification tools expertise are the twin pillars that enable effective and efficient FPGA designs. We have in-depth and hands-on knowledge of all major storage protocols – ATA, Serial ATA, SCSI, Serial Attached SCSI, PCIe (NVMe), Fibre Channel, CompactFlash+, MMC and CE-ATA. This focus enables us to keep ourselves in-sync with the developments in this domain and understand the chip architectures in the storage industry. With storage as our focus, our increasing emphasis on flash based technologies has expanded our IP Core expertise into areas such as NAND interfaces, ECC, encryption, flash controllers and RAID. IntelliProp is committed to providing the storage industry with knowledgeable consulting engineers and high quality products that solve critical problems. Our verification expertise is a broad spectrum covering robust methodology, different languages and associated tools. The IntelliProp engineers are well versed in E, VERA, SystemC, Verilog and VHDL. They are proficient in advanced verification techniques such as constrained random stimulus generation, functional and code coverage analysis, regression testing and reusable modular test-benches.

Products/Services

  • Boards and Kits
  • Design Services
  • IP Cores

Markets Supported

  • Audio Video and Broadcast
  • Automotive
  • Consumer Electronics
  • Data Center
  • Aerospace and Defense
  • Industrial
  • Medical
  • Test and Measurement
  • Wired Communications

Design Competencies

  • Embedded Application Development
  • Embedded Processors
  • FPGA Design and Integration
  • FPGA Design Optimization
  • FPGA Timing Closure
  • Industry Certification and Compliance Testing
  • PCB Design and Layout
  • Quality and Reliability Testing
  • RF and Analog Design
  • Signal Integrity Design and Analysis
  • System Architecture

Maximum Service Scope

  • Chip level FPGA - ASIC Design

Engagement Model

  • Time and Materials
  • SOW-Based Fixed Bid Projects
  • Captive Engineering Resources at Customer Location
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