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Space Radiation Effects

Xilinx strives to provide the most reliable and versatile programmable products for space applications. All test methods, results and conclusions are performed in accordance with industry and government standards with the collaboration of our customers and the scientific communities. Thanks to the efforts of the Xilinx Radiation Test Consortium (XRTC), Xilinx space-grade FPGAs are the most beam-tested, SEE-characterized devices available from any manufacturer.

Xilinx space grade products are built, tested, characterized, and specified to have a known performance in a space radiation environment. Space radiation effects generally include, but may not be limited to:

In order to assure compliance every radiation tolerant (RT) and radiation hardened by design (RHBD) product wafer fabrication lot is tested in a comprehensive TID assurance process and the results are available as part of the device data pack.  All AC, DC, timing, and parametric specifications provided in the switching characteristics datasheet (PDF) are guaranteed at the maximum TID limit stated in the device data sheet. No additional de-rating for end of life TID on such product performance need be considered as all space grade devices meet all data sheet parameters before, during and after total dose accumulation.

The TID capability of all Xilinx space grade products is evaluated utilizing Test Method 1019 which is contained in Mil-Std-883.  Specifically applicable is the latest published version (TM 1019 .7) and the full specification is available for downloading from the Defense Logistics Agency

Mil Prf 38535 Test Method 1019.7 calls for TID exposure in a Co60 source at a dose rate of between 50 and 300 rads (Si)/sec.  In previous families of product TID exposure was traditionally done at the low end of the allowable TN1019 specification.  However, due to the high TID tolerance of the Virtex-5QV, Co60 exposure was performed at a DLA (Defense Logistics Agency) certified source at the high end of the specification (300 rads(Si)/sec) to keep the exposure times tolerable.  For full TM1019.7 lot qualification, a 22 piece sample is irradiated and tested after exposure with the full production test program, which guarantees the functionality, speed, timing, and drive capability of the spec according to the data sheet.  For more information on the TID test procedures and results please review the whitepaper, “Total Ionizing Dose Tolerance of Xilinx FPGAs.”

Ionizing radiation can cause unwanted effects in semiconductor devices. Energetic Protons, Neutrons, Heavy Ions, and Alpha particles can strike sensitive regions of the transistor, causing various failures, or Single-Event Effects (SEE), such as:

  • Single-Event Upsets (SEUs)
  • Single-Event Transients (SETs)
  • Single-Event Functional Interrupt (SEFI)

Characterizing Radiation Effects

Sensitivity to radiation effects is dependent on many factors, including transistor geometry and cell layout. Certain CMOS technologies, such as SRAM, are very sensitive to SEE. Other technologies, such as the CMOS configuration latch design used in Xilinx devices, are less sensitive to SEE. While radiation hardened by design (RHBD) technologies, such as that used in the Virtex-5QV, are nearly immune to single event effects. To understand the sensitivities of a particular device, extensive radiation testing must be undertaken. In cooperation with the Xilinx Radiation Test Consortium (XRTC), Xilinx tests all FPGA and PROM devices at particle accelerators throughout the United States. Test results are analyzed and reported by experts in the XRTC.

Xilinx Radiation Test Consortium

The Xilinx Radiation Test Consortium (XRTC) was founded in 2002 by the Jet Propulsion Laboratory (JPL) and Xilinx to evaluate re-configurable FPGAs for aerospace applications. XRTC brings together top experts from industry, government, and academia to test and characterize radiation effects and mitigation techniques for re-configurable FPGAs.

A complete listing of XRTC test reports may be found on the JPL web site for space radiation effects on Xilinx FPGAs.

The Xilinx Radiation Test Consortium strives to:

  • Provide independent and unbiased testing and characterization of radiation effects and mitigation techniques in re-configurable FPGAs.
  • Facilitate industry cooperation and collaboration in the testing of re-configurable FPGAs.
  • Enable public awareness and access to test results and publications.

Radiation Testing

Through experimentation at facilities throughout the U.S., the XRTC characterizes radiation effects on Xilinx FPGAs and configuration PROMs for:

  • Latchup
  • Static Single-Event Upset (SEU)
  • Dynamic Single-Event Upset (SEU)
  • Single Event Functional Interrupt (SEFI)

Mitigation Testing

In addition to characterizing radiation effects in re-configurable FPGAs and Configuration PROMs, the XRTC evaluates radiation effect mitigation techniques such as:

  • Configuration Error Detection and Correction
  • Triple Module Redundancy (TMR)

Prompt Dose/Rate Effects

In cooperation with government agencies, major defense companies and national laboratories Xilinx high reliability products for aerospace and defense applications have been tested and qualified for programs that stipulate performance requirements in a prompt dose (non-natural radiation) environment. While these reports are not posted on our public website they may be obtained by contacting your local sales representative.

Neutron Single Event Upset (NSEU)

Upsets by atmospheric neutron is not considered a space radiation effect and therefore Xilinx space grade devices are not characterized for NSEU. However, all other Xilinx products, which are intended for terrestrial and atmospheric applications, are characterized for NSEU. The known susceptibilities for all products are posted in the UG116: Xilinx Device Reliability Report (PDF). For more information please review white paper WP402: Considerations Surrounding Single Event Effects in FPGAs, ASICs, and Processors (PDF).

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