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ASIC Prototyping and Emulation

FPGA-Based Prototyping

ASIC prototyping with FPGAs enables fast and accurate SoC system modeling and verification as well as accelerated software and firmware development. Xilinx takes prototyping to the next level with its 20nm solution, the Virtex UltraScale VU440 FPGA, and its 28nm Virtex®-7 2000T FPGA. These multi-million logic cell solutions:

  • Eliminate the need for multi-chip partitioning in many instances
  • Mitigate development risks for large ASIC and ASSP designs
  • Reduce board space requirements and complexity
  • Deliver flexible I/O to create a contiguous device
  • Reduce system level power consumption

Virtex UltraScale 440: World’s Largest FPGA

The Virtex UltraScale 440 device is based on 2nd generation Stacked Silicon Interconnect (SSI) technology:

  • 5.5M System Logic Cells, 20B transistors
  • Forty-eight 16.3Gb/s serial transceivers
  • 89Mb of block RAM
  • 1,456 I/Os

View the Design Example.

Virtex-7 2000T: Built with ASIC Prototyping in Mind

The Virtex-7 2000T FPGA enabled by Stacked Silicon Interconnect (SSI) is ideally suited for the ASIC prototyping and emulation marketplace:

  • 2M logic cells, 6.8B transistors
  • Thirty-six 12.5Gb/s serial transceivers
  • 46Mb of block RAM
  • 1,200 I/Os

ASIC Emulation in Action

Breakthrough performance and integration for ASIC prototyping and emulation can be realized with Xilinx UltraScale™ architecture. Virtex UltraScale devices simplify design partitioning through high logic capacity, over 90% device utilization, ASIC-like clocking, enhanced routing, and high-speed transceivers for pin multiplexing. This breakthrough architecture coupled with Xilinx’s Vivado® Design Suite provides the ideal solution for tackling the demands of leading-edge ASIC and SoC platforms.

View the Design Example.

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