We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

Single-chip Carrier Ethernet Based Backhaul Solution

The Xilinx modular Carrier Ethernet and Mobile Backhaul solution has the flexibility to serve as either a completely integrated SoC solution or as individual co-processor modules that can enhance functionality of an existing platform. The wired backhaul market requires support for a large number of options in which the interfaces, standards and protocols may be combined and configured.  The backhaul solution provides designers with the freedom to develop their backhaul or access products at an optimal cost, supporting optimal configuration. It addresses designer’s requirements whether they are cost reducing an existing design, enhancing an existing design or launching a new design. The SoC solution consists of packet processing and traffic management integrated in an Ethernet and MPLS-TP based switch, PWE3 Packet Engine, 1588v2 and SyncE based packet timing and synchronization, hardware enabled Ethernet and MPLS-TP OAM, control and a management plane on dual ARM® Cortex™-A9 MPCore processors. The individual components of the SoC solution are also available to function as co-processors. The implementation is based on Xilinx’s Zynq™-7000 SoC devices and offers fine-grained parameterization, lower power, and lower cost that enable single-chip backhaul or access solutions.

Solution Summary and Benefits

  • Single-chip Zynq-7000 SoC integrates up to four chips into one
  • Configurable media interfaces that support fiber and copper
  • Forwarding throughput scales from a few Gbps to 20Gbps
  • Scalable and optimized software and hardware architecture that is common across product family, lowering R&D cost significantly

SmartCORE Solutions


  • Carrier Ethernet Packet Processing
  • PWE 3
  • 1588 v2
  • Packet Timing A Synchronization
  • Ethernet OAM

Programmable Logic Functions

  • Packet encapsulation
  • OAM packet generation
  • Packet processing
  • Traffic management/QoS
  • Switching
  • MAC
  • Framers
  • Time stamping and SyncE
  • ERPS
  • PWE 3

Processor Sub-System Functions

  • MPLS control plane
  • Carrier Ethernet control plane
  • OAM processing
  • System controller
  • Configuration management
  • Fault management
  • Accounting and statistics
  • SNMP
Page Bookmarked