Employing Xilinx wireless connectivity IP and FPGAs enables integration of multiple devices connecting baseband channel cards to remote radio heads into a single device based I/Q switch. An integrated CPRI I/Q switch on an FPGA supports all line rates, I/Q data switching and combining, and multiple Ethernet control messaging channels and switching to allow highly flexible and granular interconnect to ease deployment, reconfiguration, and field enhancements.
This Proof of Concept (PoC) design provides a six port Lightweight Ethernet Switch for use in CPRI-based wireless systems. The switch is implemented as a four port gigabit switch and a three port aggregator to minimize resource utilization. The aggregator can be scaled to support more ports, if required.
The Lightweight Ethernet Switch is targeted at wireless systems and uses an architecture that supports a scalable number of radio connections using a port aggregator to reduce the resource requirements. A simplified application is shown in Figure 1 and consists of the following Ethernet ports:
Figure 1 – Typical Application System
The Lightweight Ethernet Switch architecture is based on sharing the available bandwidth between multiple downstream (radio) links where little Ethernet traffic is required during normal operation of the system. In the PoC example the three downstream CPRI links are connected through the aggregator/de-aggregator and share a single connection to the main switch as shown in Figure 2. This enables support for an increased number of downstream links.
The resource utilization and approximate bandwidth available at each aggregated downstream port for selected configurations is shown in Table 1
Table 1: Resource Utlization
|6 Ports||28||4000||6000||100 Mbit/s|
|12 Ports||52||6000||10000||25 Mbit/s|
|18 Ports||60||8000||14000||10 Mbit/s|
The Lightweight Ethernet Switch PoC design is delivered as a zip file available in the Xilinx lounge (registration required). The zip file contains encrypted source for the switch and a example design delivered with the switch, demonstrating simple pattern generation and checking. In addition a test bench and implementation and simulation scripts for use in the Vivado® Design Suite are provided. The switch has a static configuration of six ports.
The IQ switch has been verified using the UVM methodology.