SDSoC Development Environment

Overview

Note: Starting 2019.2, SDK, SDSoC™ and SDAccel™ development environments are unified into an all-in-one Vitis™ unified software platform for application acceleration and embedded software development. There will be no 2019.2 or future releases of SDSoC Development Environment.

Familiar Embedded C/C++/OpenCL Application Development Experience

The SDSoC™ development environment provides a familiar embedded C/C++/OpenCL application development experience including an easy to use Eclipse IDE and a comprehensive design environment for heterogeneous Zynq SoC and MPSoC deployment. Complete with the industry's first C/C++/OpenCL full-system optimizing compiler, SDSoC delivers system level profiling, automated software acceleration in programmable logic, automated system connectivity generation, and libraries to speed programming. It also enables end user and third party platform developers to rapidly define, integrate, and verify system level solutions and enable their end customers with a customized programming environment.

  • AMD OpenCV libraries are now  available featuring 50+ hardware optimized OpenCV functions, including  Gausian, Median, Bilateral, Harris corner, Canny edge detection, HoG, SVM, LK Optical Flow, and many more
  • Easy to use Eclipse IDE to develop a full Zynq SoC and MPSoC system with embedded C/C++/OpenCL applications
  • Accelerate a function in Programmable Logic (PL) with a click of button
  • Supports bare metal, Linux and FreeRTOS as target OS

System-Level Profiling

  • Rapid performance estimation and area estimation including PS, data communication and PL in minutes
  • Automated run-time instrumentation of cache, memory and bus utilizations
  • Enables early and rapid generation and exploration for optimal total system architecture
SDSoC

Full System Optimizing Compiler

  • Compiles C/C++/OpenCL applications into a fully functional Zynq SoC and MPSoC system
  • Automatic function acceleration in programmable logic generating both the ARM software and FPGA bitstream
  • Optimizes the system connectivity and allows rapid system exploration of throughput, latency and area tradeoffs

Expert Use Model for Platform Developers

  • Target custom board by proven methodology to convert existing Vivado project and software project into SDSoC
  • Board Support Packages (BSP) for Zynq-based development boards are available today including the ZCU102, ZC702, ZC706, as well as third party boards and System-on-Module (SoM) including Zedboard, Microzed, Zybo, Avnet Embedded Vision Kit, Video and Imaging Kit, SDR kit and more. Please click on the "Board and Modules" for the full list BSPs.
Libraries & Design Examples

Hardware Optimized Libraries

Library Suites Latest SDSoC Version Supported Provider
xfOpenCV
50+ hardware optimized OpenCV functions, including Gausian, Median, Bilateral, Harris corner, Canny edge detection, HoG, ORB, SVM, LK Optical Flow, and many more
2018.3 AMD

Design Example Provided by AMD

Design Example & Descriptions Latest SDSoC Version Supported Board & SOM Supported Provider
LK Dense Optical Flow
iterative and pyramidal based implementation doing motion segmentation
2018.3

ZCU102

ZCU104

Get Started

 

AMD
Stereo Disparity Map
Calculates disparity map from two sensor inputs using local block matching
Warp Transform
Harris Corner
Bilateral Filter
Color Space Conversion - RGB/HSV
Demonstrates packed and aligned structs that contain pixel values. Passing the structs to a hardware function for RGB to HSV conversion and using a software function to convert HSV back to RGB.
All
Matrix Multiply and Addition
32x32 Floating point matrix multiply and matrix addition. Demonstrates AXI DMA inference as well as direct IP-IP streaming connections
FIR Filter
Demonstrates a simple C-callable HDL IP using AMD FIR compiler

Community Contributed Design Examples

GitHub Design Examples Many more OpenCV design examples

Machine Learning Demos

Design Example & Descriptions Inquiry Board & SOM Supported Provider
GoogleNet SDSoC 2018.3

ZCU102

ZCU104

Ultra96

DPB1303

AMD
ResNet50
VGG-16
Mobilenet V2
SSD + 14pt (Pose Estimation)
SSD (Video Analysis)
Yolo v3 (ADAS Detection)
Densebox (Face Detection)
FPN (Semantic Segmentation)

Design Example Offered by Partners

Design Example & Descriptions Provider

Automotive ADAS
Set of different algorithms used in ADAS applications such as: multi-camera Surrounding View, Driver Drowsiness Detection and Smart Rear-View Camera.

Aldec

AES Encryption
A 128-bit AES encryption algorithm acceleration

DornerWorks

Face Detection and Tracking
Demonstrating how an existing HDL IP can be wrapped into a C-function and used in SDSoC. Face detection from live camera running more than 30 FPS

Xylon

Face & Eye Detection demo
Demo shows how to use SDx and TySOM board in Face and Eye detection application.

Aldec

DDS
DDS block written in HLS C code outputing various signal patterns to the DAC TX output

Analog Devices

Industrial IoT
Demo project shows how to use TySOM board with a robotic arm in industrial applications.

Aldec

IoT Gateway
Demo project shows how to use different wireless sensors and actuators in IoT application and how to establish a communication channel with Amazon AWS Iot Cloud.

Aldec
Boards, Kits, & Modules

Embedded Vision

Board Name I/O Enabled Latest SDSoC Supported Design Examples Provider
ZCU104 + Sony IMX274 MIPI + Stereo camera USB3 MIPI in, HDMI in, USB3 in, HDMI out, DisplayPort out 2018.3

Live I/O:

  • Dense Optical Flow
  • Stereo Vision (Depth Detection)

File I/O:

  • Bilateral Filter
  • Harris Filter
  • Dense Optical Flow
  • Stereo Vision (Depth Detection)
  • Warp Transformation
AMD
ZCU102 + Sony IMX274 MIPI + Stereo camera USB3
ZC702 + HDMI IO FMC
HDMI in, HDMI out, PS DDR
2017.2

Live I/O:

  • Dense Optical Flow

 

File I/O:

  • Bilateral Filter
  • Harris Filter
  • Dense Optical Flow
  • Stereo Vision (Depth Detection)
  • Warp Transformation
ZC706 + HDMI IO FMC
HDMI in, HDMI out, PS DDR
2017.2

Built-in Platforms

Board Name I/O Enabled Latest SDSoC Version Supported Design Examples Provider
ZCU102 (Zynq Ultrascale+ MPSoC) ​PS DDR 2018.3 Basic Suite*​ AMD
ZCU104 (Zynq Ultrascale+ MPSoC) PS DDR 2018.3 Basic Suite* AMD
ZCU106 (Zynq Ultrascale+ MPSoC) PS DDR 2018.3 Basic Suite* AMD
ZC702 (Zynq 7000)
PS DDR 2018.3 Basic Suite* AMD
ZC706​ (Zynq 7000)
PS DDR 2018.3 Basic Suite* AMD
ZedBoard (for Zynq 7000)
PS DDR 2018.3 Basic Suite* AMD

* Basic Suite = Matrix Multiply and Addition, FIR filter, File I/O Video processing and sample applications (See design examples)

Video Platforms (Externally Provided)

Board Name I/O Enabled Latest SDSoC Supported Design Examples Provider
TySOM-2-7Z045 + FMC-ADAS + HDR-CMOS Camera Sensor (192 degree) with LVDS data interface

FPD-Link III LVDS Interface, HDMI OUT, USB2.0, Ethernet 10/100/1000

2017.2
(path to github platforms)

Sobel Edge Detection

Aldec
TySOM-2-7Z045 + FMC-ADAS + FMC-VISION+ HDR-CMOS Camera Sensor (192 degree) with LVDS data interface

FPD-Link III LVDS Interface, HDMI OUT, USB2.0, Ethernet 10/100/1000

2017.2
(path to github platforms)

Sobel Edge Detection

TySOM-2-7Z100 + FMC-ADAS + HDR-CMOS Camera Sensor (192 degree) with LVDS data interface

FPD-Link III LVDS Interface, HDMI OUT, USB2.0, Ethernet 10/100/1000

2017.2
(path to github platforms)

Sobel Edge Detection

TySOM-2-7Z100 + FMC-ADAS + FMC-VISION+ HDR-CMOS Camera Sensor (192 degree) with LVDS data interface

FPD-Link III LVDS Interface, HDMI OUT, USB2.0, Ethernet 10/100/1000

2017.2
(path to github platforms)

Sobel Edge Detection

TySOM-2A-7Z030 + FMC-ADAS + HDR-CMOS Camera Sensor (192 degree) with LVDS data interface

FPD-Link III LVDS Interface, HDMI OUT, USB2.0, Ethernet 10/100/1000

2017.2
(path to github platforms)

Sobel Edge Detection

PicoZed Embedded Vision Kit Python 1300 in, HDMI out, PS DDR

2016.2

Optical Flow, Stereo Disparity, Sobel Filter, Motion Detect Avnet
MicroZed Embedded Vision Kit Python 1300 in, HDMI out, PS DDR

2016.2

Optical Flow, Stereo Disparity, Sobel Filter, Motion Detect Avnet
ZC706
PL DDR, PS DDR 2016.2 Matrix Multiply using PL DDR AMD
PYTHON-1300-C +, HDMI IO FMC
Python 1300 in, HDMI in, HDMI out, PS DDR 2015.4 Sobel Filter, Motion Detect Avnet
Zing2 + HDMI IO FMC
HDMI IN, HDMI OUT, GPIO,PS,DDR3 2016.2 Basic Suite*, RGB2HSV,Sobel Filter, Edge Detection V3 Technology
SNOWLeo SVC
CMOS IN,HDMI OUT,GPIO,PS,DDR3 2016.2 Basic Suite*, RGB2HSV,Sobel Filter, Edge Detection V3 Technology
EMC2-Z7015
PS DDR 2015.4 Basic Suite*, Sobel Filter, Motion Detection Sundance
BORA
LVDS Video Out, PS DDR 2015.4 Basic Suite*, Sobel Filter, Motion Detection DAVE Embedded Systems
BORA Xpress
LVDS Video Out, PS DDR 2015.4 Basic Suite*, Sobel Filter, Motion Detection DAVE Embedded Systems
SVDK PicoZed 7015

SVDK Sensor in Ethernet (GigE vision) out HDMI out

2015.4

Basic Suite*, GigE-Vision1.2 Tx, OpenCV Harris Corner Detect/ SDSoC Corner Detect (Harris Corner Acceleration)

OKI IDS

* Basic Suite = Matrix Multiply and Addition, FIR filter, File I/O Video processing and sample applications (See design examples)

Radio Platforms (Externally Provided)

Board Name I/O Enabled Lastest SDSoC Version Supported Design Examples Provider
ZC706 + AD9361 SDR Systems Development Kit
ADC, DAC, PS DDR 2015.2.1 DDS,
Basic Suite*
Analog Devices

* Basic Suite = Matrix Multiply and Addition, FIR filter, File I/O Video processing and sample applications (See design examples)

Control Platforms (Externally Provided)

Board Name I/O Enabled Latest SDSoC Version Supported Design Examples Provider
TySOM-2A-7Z030 + FMC-NET Ethernet 10/100/1000, WiFi 2017.2 (Path to the github) Ethernet Router with reprogrammable logic based on OpenWrt firmware Aldec
TB-7Z-IAE
Gigabit Ethernet, PS DDR 2015.4 Basic Suite*, Industrial Networking Tokyo Electron Device (TED)

* Basic Suite = Matrix Multiply and Addition, FIR filter, File I/O Video processing and sample applications (See design examples)

Basic Platforms (Externally Provided)

Board Name I/O Enabled Latest SDSoC Version Supported Design Examples Provider
TySOM-1-7Z030 PS DDR, uSD Card Socket, Ethernet 10/100/1000,
USB 3.0 and USB 2.0, miniPCI-Express,
Pmode Compatible Header,
HDMI OUT, Audio Codec

2017.2
(path to github platforms)

File I/O:

  • Bilateral Filter
  • Harris Filter
  • Dense Optical Flow
  • Stereo Vision (Depth Detection)
  • Warp Transformation
Aldec
TySOM-2-7Z045 PS DDR, uSD Card Socket, Ethernet 10/100/1000,
USB 2.0, HDMI OUT,
FMC HPC

2017.2
(path to github platforms)

File I/O:

  • Bilateral Filter
  • Harris Filter
  • Dense Optical Flow
  • Stereo Vision (Depth Detection)
  • Warp Transformation
Aldec
TySOM-2-7Z100 PS DDR, uSD Card Socket, Ethernet 10/100/1000,
USB 2.0, HDMI OUT,
FMC HPC

2017.2
(path to github platforms)

File I/O:

  • Bilateral Filter
  • Harris Filter
  • Dense Optical Flow
  • Stereo Vision (Depth Detection)
  • Warp Transformation
Aldec
TySOM-2A-7Z030 PS DDR, uSD Card Socket, Ethernet 10/100/1000 IEEE1588,
USB 2.0, HDMI OUT,
FMC HPC

2017.2
(path to github platforms)

File I/O:

  • Bilateral Filter
  • Harris Filter
  • Dense Optical Flow
  • Stereo Vision (Depth Detection)
  • Warp Transformation
Aldec
Mars ZX3
PS DDR, HDMI 2015.4 Basic Suite* Enclustra
Mercury ZX1
PS DDR 2015.4 Basic Suite* Enclustra
Mercury ZX5
PS DDR 2015.4 Basic Suite* Enclustra
KRM-3Z20
PS DDR 2015.4 Basic Suite* Knowledge Resource
KRM-3Z30
PS DDR 2015.4 Basic Suite* Knowledge Resource
MIAMI
PS DDR 2015.4 Basic Suite* TOPIC
Z-turn 7010/7020 Board
PS DDR 2015.4 Basic Suite* Shenzhen MYIR Tech

* Basic Suite = Matrix Multiply and Addition, FIR filter, File I/O Video processing and sample applications (See design examples)

Documentation

Documentation

Default Default Title Document Type Date
Training & Support