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Power Efficiency

Unrivaled System-level Power Reduction

Through careful selection of silicon process and power-conscious architecture design, Xilinx devices deliver power efficiency across all product portfolios, including Spartan-6, 7 series, UltraScale™, and UltraScale+™ FPGAs, and SoCs. With each generation, Xilinx broadens its power reduction capabilities, ranging from process enhancements, architectural innovations, aggressive voltage scaling strategies, and advanced software optimization strategies. More detail on portfolio-specific capabilities, silicon process advantages, and benchmark comparisons are shown below. Power estimation, thermal models, full software support, and demonstration boards are publically available for all families.

UltraScale+ FPGAs

Based on a high performance, low-power semiconductor process (TSMC 16nm FinFET+), the UltraScale+ device families delivers up to 60% overall device-level power savings over 7 series FPGAs and SoCs. Architectural enhancements include:

  • Hardware-based clock gating
  • Hardened BRAM cascading
  • DSP block efficiencies
  • Power-optimized transceivers

Through architectural innovation and a dual-voltage operation of the primary core fabric, UltraScale+ families more than double the performance-per watt-capabilities of 7 series families by realizing power reductions while improving overall performance.

  7 Series
(28nm)
VNOM
UltraScale
(20nm)
VNOM
UltraScale+
(16nm)
VNOM
UltraScale+
(16nm)
VLOW
Operating Voltage (VCCINT) 1V 0.95V 0.85V 0.72V
Normalized Facric Performance 1.0x 1.2x 1.6x 1.2x
Normalized Total Power 1.0x 0.7x 0.8x 0.5x
Performance/Watt 1.0x 1.7x 2x 2.4x

Zynq UltraScale+ MPSoCs

In addition to all the power reducing capabilities of UltraScale+ FPGA logic, Zynq UltraScale+ MPSoCs utilize multiple power islands and domains within the processing system for coarse-grain and fine-grain dynamic power gating to continually adjust power consumption to performance demands, lowering overall device power.

UltraScale FPGAs

Based on a low-power 20nm semiconductor process coupled with significant static and power gating, UltraScale FPGA families deliver up to 40% overall device-level power savings compared to 7 series FPGAs. Architectural enhancements shared with UltraScale+ devices include

  • Hardware-based clock gating
  • Hardened BRAM cascading
  • DSP block efficiencies
  • Power-optimized transceivers
  7 Series
(28nm)
VNOM
UltraScale
(20nm)
VNOM
UltraScale+
(16nm)
VNOM
UltraScale+
(16nm)
VLOW
Operating Voltage (VCCINT) 1V 0.95V 0.85V 0.72V
Normalized Facric Performance 1.0x 1.2x 1.6x 1.2x
Normalized Total Power 1.0x 0.7x 0.8x 0.5x
Performance/Watt 1.0x 1.7x 2x 2.4x

7 Series FPGAs & Zynq-7000 Programmable SoCs

As the only 28nm FPGAs and SoCs fabricated on a high-performance, low-power process (28HPL), 7 series devices offer up to 50% total power reduction over previous generation families and superior performance per watt compared to competing 28nm solutions. Architectural and block-level innovations include:

  • Partial reconfiguration for static power savings
  • Multi-mode I/O control
  • Intelligent clock gating
  • Power binning and voltage scaling

View competitive benchmark summaries as well as detailed benchmark process.

Optimized Power Delivery Solutions

Power management requirements are diverse and often unique to a specific use case. As a result, no single power management design can provide the optimal solution. Xilinx partners with the industry’s leading power management companies (list below) to provide a variety of reference designs mapping to common use cases, as well as overall guidance on the power supply requirements of Xilinx products  

Reference Designs

Below you will find a selection of reference designs developed together with some of our power management partners. Designs are grouped by product family, however, many of these reference designs can be easily modified and applied to other product families. Please contact our partners for additional information and guidance in relation to any designs shown below.

Note 1: For more information on Zynq UltraScale+ device use-cases, please see the Power Supply Consolidation Solutions for Zynq UltraScale+ MPSoCs section of  UG583.

Note: All solutions are the responsibility of the specific power vendor. Please check with the appropriate power vendor for additional information, e.g., availability.

Webinars and App Notes

Type Vendor Description Target Devices
Webinar Infineon DC/DC PMIC for Xilinx FPGAs/SoCs for 10W to 50W Applications w/ Avnet Zynq UltraScale+, Zynq-7000, Kintex UltraScale
App Note On Semiconductor Zynq UltraScale+ MPSoC Automotive power solutions to ASIL-C Zynq UltraScale+

Power Management Companies

Distribution Partner

Power Efficiency

Xilinx provides best-in-class tools to estimate pre-implementation power consumption, optimize for lowest power at every design stage, and provide extensive analysis for user-guided optimization. Below are a variety of power-related and Xilinx industry-leading hardware and software-based tools for designers to get started today.

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