Performance and Resource Utilization for AXI Multi Channel Direct Memory Access v1.1

Vivado Design Suite Release 2021.2

Interpreting the results

This page contains maximum frequency and resource utilization data for several configurations of this IP core. The data is separated into a table per device family. In each table, each row describes a test case. The columns are divided into test parameters and results. The test parameters include the part information and the core-specific configuration parameters. Any configuration parameters that are not listed have their default values; any parameters with a blank value are disabled or set automatically by the IP core. Consult the product guide for this IP core for a list of GUI parameter and user parameter mappings.

Data is provided for the following device families:

Kintex UltraScale

Part Information Configuration Parameters Performance and Resource Utilization
Device Package Speed Grade Configuration Name
c_num_mm2s_channels
c_num_s2mm_channels
c_prmry_is_aclk_async
c_m_axi_mm2s_data_width
c_m_axis_mm2s_tdata_width
c_m_axi_s2mm_data_width
c_s_axis_s2mm_tdata_width
Fixed clocks (MHz) Clock Input Fmax (MHz) LUTs FFs DSPs 36k BRAMs 18k BRAMs Speedfile Status
xcku040 ffva1156 1 UltraScale_128DW_8Ch_1 8 8 0 128 128 128 128 s_axi_lite_aclk=100 s_axi_aclk 313 7985 9582 0 6 5 PRODUCTION 1.25 12-04-2018
xcku040 ffva1156 2 UltraScale_128DW_8Ch_2 8 8 0 128 128 128 128 s_axi_lite_aclk=100 s_axi_aclk 369 8026 9481 0 6 5 PRODUCTION 1.25 12-04-2018
xcku040 ffva1156 3 UltraScale_128DW_8Ch_3 8 8 0 128 128 128 128 s_axi_lite_aclk=100 s_axi_aclk 425 8053 9551 0 6 5 PRODUCTION 1.25 12-04-2018
xcku040 ffva1156 1 UltraScale_32DW_1 0 s_axi_lite_aclk=100 s_axi_aclk 313 2701 4561 0 3 2 PRODUCTION 1.25 12-04-2018
xcku040 ffva1156 2 UltraScale_32DW_2 0 s_axi_lite_aclk=100 s_axi_aclk 379 2723 4563 0 3 2 PRODUCTION 1.25 12-04-2018
xcku040 ffva1156 3 UltraScale_32DW_3 0 s_axi_lite_aclk=100 s_axi_aclk 444 2765 4565 0 3 2 PRODUCTION 1.25 12-04-2018

Kintex UltraScale+

Part Information Configuration Parameters Performance and Resource Utilization
Device Package Speed Grade Configuration Name
c_num_mm2s_channels
c_num_s2mm_channels
c_prmry_is_aclk_async
c_m_axi_mm2s_data_width
c_m_axis_mm2s_tdata_width
c_m_axi_s2mm_data_width
c_s_axis_s2mm_tdata_width
Fixed clocks (MHz) Clock Input Fmax (MHz) LUTs FFs DSPs 36k BRAMs 18k BRAMs Speedfile Status
xcku5p ffvb676 1 UltraScalePlus_128DW_8Ch_1 8 8 0 128 128 128 128 s_axi_lite_aclk=100 s_axi_aclk 460 8084 9479 0 6 5 PRODUCTION 1.28 02-27-2020
xcku5p ffvb676 2 UltraScalePlus_128DW_8Ch_2 8 8 0 128 128 128 128 s_axi_lite_aclk=100 s_axi_aclk 535 8158 9551 0 6 5 PRODUCTION 1.28 02-27-2020
xcku5p ffvb676 3 UltraScalePlus_128DW_8Ch_3 8 8 0 128 128 128 128 s_axi_lite_aclk=100 s_axi_aclk 554 8164 9582 0 6 5 PRODUCTION 1.28 02-27-2020
xcku5p ffvb676 1 UltraScalePlus_32DW_1 0 s_axi_lite_aclk=100 s_axi_aclk 441 2718 4561 0 3 2 PRODUCTION 1.28 02-27-2020
xcku5p ffvb676 2 UltraScalePlus_32DW_2 0 s_axi_lite_aclk=100 s_axi_aclk 535 2801 4596 0 3 2 PRODUCTION 1.28 02-27-2020
xcku5p ffvb676 3 UltraScalePlus_32DW_3 0 s_axi_lite_aclk=100 s_axi_aclk 590 2890 4562 0 3 2 PRODUCTION 1.28 02-27-2020

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