Zynq UltraScale+ Devices Register Reference > Module Summary > DDR_QOS_CTRL Module > RD_HPR_THRSLD (DDR_QOS_CTRL) Register

RD_HPR_THRSLD (DDR_QOS_CTRL) Register

RD_HPR_THRSLD (DDR_QOS_CTRL) Register Description

Register NameRD_HPR_THRSLD
Relative Address0x0000000008
Absolute Address 0x00FD090008 (DDR_QOS_CTRL)
Width32
TypemixedMixed types. See bit-field details.
Reset Value0x00000000
DescriptionSet Value for Read HPR (High Priority Read) CAM Threshold

RD_HPR_THRSLD (DDR_QOS_CTRL) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:7razRead as zero0x0Reserved for future use
VALUE 6:0rwNormal read/write0x0Read HPR CAM Threshold Level