Zynq UltraScale+ Devices Register Reference > Module Summary > DDRC Module > ADDRMAP11 (DDRC) Register
|Absolute Address||0x00FD07022C (DDRC)|
|Description||Address Map Register 11|
This register is static. Static registers can only be written when the controller is in reset.
|Field Name||Bits||Type||Reset Value||Description|
|addrmap_row_b10||3:0||rwNormal read/write||0x0||Selects the HIF address bits used as row address bit 10.|
Valid Range: 0 to 11
Internal Base: 16
The selected HIF address bit for each of the row address bits is determined by adding the internal base to the value of this field. This register field is used only when ADDRMAP5.addrmap_row_b2_10 is set to value 15.