ADDRMAP2 (DDRC) Register Description
| Register Name | ADDRMAP2 |
|---|---|
| Offset Address | 0x0000000208 |
| Absolute Address | 0x00FD070208 (DDRC) |
| Width | 32 |
| Type | rwNormal read/write |
| Reset Value | 0x00000000 |
| Description | Address Map Register 2 |
This register is static. Static registers can only be written when the controller is in reset.
ADDRMAP2 (DDRC) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| addrmap_col_b5 | 27:24 | rwNormal read/write | 0x0 | - Full bus width mode: Selects the HIF address bit used as column address bit 5. - Half bus width mode: Selects the HIF address bit used as column address bit 6. - Quarter bus width mode: Selects the HIF address bit used as column address bit 7. Valid Range: 0 to 7, and 15 Internal Base: 5 The selected HIF address bit is determined by adding the internal base to the value of this field. If set to 15, this column address bit is set to 0. |
| addrmap_col_b4 | 19:16 | rwNormal read/write | 0x0 | - Full bus width mode: Selects the HIF address bit used as column address bit 4. - Half bus width mode: Selects the HIF address bit used as column address bit 5. - Quarter bus width mode: Selects the HIF address bit used as column address bit 6. Valid Range: 0 to 7, and 15 Internal Base: 4 The selected HIF address bit is determined by adding the internal base to the value of this field. If set to 15, this column address bit is set to 0. |
| addrmap_col_b3 | 11:8 | rwNormal read/write | 0x0 | - Full bus width mode: Selects the HIF address bit used as column address bit 3. - Half bus width mode: Selects the HIF address bit used as column address bit 4. - Quarter bus width mode: Selects the HIF address bit used as column address bit 5. Valid Range: 0 to 7 Internal Base: 3 The selected HIF address bit is determined by adding the internal base to the value of this field. |
| addrmap_col_b2 | 3:0 | rwNormal read/write | 0x0 | - Full bus width mode: Selects the HIF address bit used as column address bit 2. - Half bus width mode: Selects the HIF address bit used as column address bit 3. - Quarter bus width mode: Selects the HIF address bit used as column address bit 4. Valid Range: 0 Internal Base: 2 The selected HIF address bit is determined by adding the internal base to the value of this field. Note, it is required to program this to 0. |