Zynq UltraScale+ Devices Register Reference > Module Summary > DDRC Module > PSTAT (DDRC) Register

PSTAT (DDRC) Register

PSTAT (DDRC) Register Description

Register NamePSTAT
Relative Address0x00000003FC
Absolute Address 0x00FD0703FC (DDRC)
Width32
TyperoRead-only
Reset Value0x00000000
DescriptionPort Status Register

PSTAT (DDRC) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
wr_port_busy_521roRead-only0x0Indicates if there are outstanding writes for port 5.
wr_port_busy_420roRead-only0x0Indicates if there are outstanding writes for port 4.
wr_port_busy_319roRead-only0x0Indicates if there are outstanding writes for port 3.
wr_port_busy_218roRead-only0x0Indicates if there are outstanding writes for port 2.
wr_port_busy_117roRead-only0x0Indicates if there are outstanding writes for port 1.
wr_port_busy_016roRead-only0x0Indicates if there are outstanding writes for port 0.
rd_port_busy_5 5roRead-only0x0Indicates if there are outstanding reads for port 5.
rd_port_busy_4 4roRead-only0x0Indicates if there are outstanding reads for port 4.
rd_port_busy_3 3roRead-only0x0Indicates if there are outstanding reads for port 3.
rd_port_busy_2 2roRead-only0x0Indicates if there are outstanding reads for port 2.
rd_port_busy_1 1roRead-only0x0Indicates if there are outstanding reads for port 1.
rd_port_busy_0 0roRead-only0x0Indicates if there are outstanding reads for port 0.