Zynq UltraScale+ Devices Register Reference > Module Summary > SERDES Module > L0_TX_ANA_TM_13 (SERDES) Register

L0_TX_ANA_TM_13 (SERDES) Register

L0_TX_ANA_TM_13 (SERDES) Register Description

Register NameL0_TX_ANA_TM_13
Relative Address0x00000034
Absolute Address0xFD400034 (SERDES)
Width32
Typemixed
Reset Value0x00000002
DescriptionRegister value is generated by Vivado PCW.

L0_TX_ANA_TM_13 (SERDES) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
TX_swap_polarity 3rw0x0Value generated by PCW.
force_TX_swap_polarity 2rw0x0Value generated by PCW.