The LUT is the basic building block of an FPGA and is capable of implementing any logic function of N Boolean variables. Essentially, this element is a truth table in which different combinations of the inputs implement different functions to yield output values. The limit on the size of the truth table is N, where N represents the number of inputs to the LUT. For the general N-input LUT, the number of memory locations accessed by the table is 2N. This allows the table to implement 2N^N functions. Note that a typical value for N in Xilinx FPGAs is 6.

The hardware implementation of a LUT can be thought of as a collection of memory cells connected to a set of multiplexers, as shown in the following figure.

The inputs to the LUT act as selector bits on the multiplexer to select the result at a given point in time. It is important to keep this representation in mind, because a LUT can be used as both a function compute engine and a data storage element.