IP Configuration Parameters

Most HDL IP cores are customizable at synthesis time. This customization is done through IP parameters that define the IP core’s behavior. The SDSoC environment uses this information at the time the core is instantiated in a generated system. This information is captured in an XML file.

The xd:component name is the same as the spirit:component name, and each xd:parameter name must be a parameter name for the IP. To view the parameter names in IP integrator, right-click on the block and select Edit IP Meta Data to access the IP Customization Parameters.

For example:
<!—- FILE: fir.params.xml -->
<?xml version="1.0" encoding="UTF-8"?> 
<xd:component xmlns:xd="http://www.xilinx.com/xd" xd:name="fir_compiler"> 
  <xd:parameter xd:name="DATA_Has_TLAST" xd:value="Packet_Framing"/> 
  <xd:parameter xd:name="M_DATA_Has_TREADY" xd:value="true"/> 
  <xd:parameter xd:name="Coefficient_Width" xd:value="8"/> 
  <xd:parameter xd:name="Data_Width" xd:value="8"/> 
  <xd:parameter xd:name="Quantization" xd:value="Integer_Coefficients"/> 
  <xd:parameter xd:name="Output_Rounding_Mode" xd:value="Full_Precision"/> 
  <xd:parameter xd:name="CoefficientVector"
 xd:value="6,0,-4,-3,5,6,-6,-13,7,44,64,44,7,-13,-6,6,5,-3,-4,0,6"/> </xd:component>