Output Directories of the v++ Command

The directory structure generated by the command-line flow has been organized to let you easily find and access files from the project. By navigating the various compile, link, logs, and reports directories, you can easily find generated files. Similarly, each kernel will also have a directory structure created.

When using v++ on the command line, by default it creates a directory structure during compile and link. The XO and XCLBIN files are always generated in the current working directory. All the intermediate files are created under the directory specified by the --temp_dir option, which defaults to _x when --temp_dir is not specified. The link, logs, and reports directories default to inside of the temp_dir, and contain the respective information on the builds.

You can optionally change the directory structure using the following v++ options:

-–temp_dir <dir_name>
--log_dir <dir_name>
-–report_dir <dir_name>
The example application uses the following command lines:
## Kernel Compilation command:
v++ -t hw_emu --config design.cfg -c -k mmult -I'../src' \
-o'mmult.hw_emu.xilinx_u200_xdma_201830_3.xo' '../src/mmult.cpp'

## Device Binary Linking Command: 
v++ -t hw_emu --config design.cfg -l \
-o'mmult.hw_emu.xilinx_u200_xdma_201830_3.xclbin' mmult.hw_emu.xilinx_u200_xdma_201830_3.xo

The design.cfg file includes the following:

platform=xilinx_u200_xdma_201830_3
debug=1
save-temps=1
temp_dir=temp_dir

[connectivity]
nk=mmult:1:mmult_1

The output directory structure follows, where $cwd is the current working directory from which the commands are launched:


### V++ Command Line Directory Structure
$cwd
	>design.cfg

	>emconfig.json -- emulation platform generated by emconfigutil

	>emulation_debug.log

	>host.exe  -- host executable
	>mmult.hw_emu.xilinx_u200_xdma_201830_3.xclbin  -- device binary generated by v++ --link

	>mmult.hw_emu.xilinx_u200_xdma_201830_3.xclbin.info  -- device binary information file generated by kernelinfo utility

	>mmult.hw_emu.xilinx_u200_xdma_201830_3.xclbin.link_summary  -- summary report of the v++ link command viewable in Vitis analyzer

	>mmult.hw_emu.xilinx_u200_xdma_201830_3.xclbin.run_summary  -- summary report of the hardware emulation run viewable in Vitis analyzer

	>mmult.hw_emu.xilinx_u200_xdma_201830_3.xo  -- compiled kernel object file generated by v++ --compile

	>mmult.hw_emu.xilinx_u200_xdma_201830_3.xo.compile_summary  --  summary report of the v++ compile command viewable in Vitis analyzer

	>profile_summary.csv  -- profile summary produced by XRT during the host/kernel run

	>temp_dir  -- The build directory specified by the --temp_dir option. This defaults to _x when not specified. 

		>link  --  the output files of the link process
			>activetask.json
			>int
				>address_map.xml
				>appendSection.rtd
				>behav_waveform
					>xsim  --  the Vivado simulator contents with results from hardware emulation
				>behav.xse
				>cf2sw_full.rtd
				>cf2sw.rtd
				>consolidated.cf
				>dr.bd.tcl
				>kernel_info.dat
				>_kernel_inst_paths.dat
				>kernel_service.json
				>mmult
				>mmult.hw_emu.xilinx_u200_xdma_201830_3_build.rtd
				>mmult.hw_emu.xilinx_u200_xdma_201830_3.gpp_so.log
				>mmult.hw_emu.xilinx_u200_xdma_201830_3.rtd
				>mmult.hw_emu.xilinx_u200_xdma_201830_3.so
				>mmult.hw_emu.xilinx_u200_xdma_201830_3.xml
				>mmult.hw_emu.xilinx_u200_xdma_201830_3_xml.rtd
				>_new_clk_freq
				>sdsl.dat
				>syslinkConfig.ini
				>systemDiagramModel.json
				>systemDiagramModelSlrBaseAddress.json
				>vplConfig.ini
				>vplsettings.json
				>xclbin_orig.1.xml
				>xclbin_orig.xml
				>xclbin_orig.xml.tmp
				>xo  -- the temporary kernel files created by the v++ --compile command
					>ip_repo
					>mmult
			>link.spr
			>link.steps.log
			>run_link
				>gen_run.xml
				>htr.txt
				>vpl.pb
			>sys_link  -- files related to the platform used during linking
				>bd
				>cfgraph
				>dr.xml
				>emu
				>iprepo
				>sdsl.dat
				>_sysl
				>xilinx_u200_xdma_201830_3.hpfm
			>vivado  --  the Vivado Design Suite files for synthesis, implementation, and bitstream generation
				>vivado.spr
				>vpl
					>gen_run.xml
					>htr.txt
					>ipirun.tcl
					>ISEWrap.js
					>ISEWrap.sh
					>openprj.tcl
					>output
						>emu_ooc_copy.xdc
						>insert_debug_profiling.tcl
						>_post_sys_link_gen_constrs.xdc
						>resource.json
					>prj  --  the Vivado Design Suite project files
						>prj.cache
						>prj.gen
						>prj.hw
						>prj.ip_user_files
						>prj.sim
						>prj.srcs
						>prj.xpr
					>rundef.js
					>runme.bat
					>runme.log
					>runme.sh
					>scripts
						>_vivado_params.tcl
					>vivado_config_hw_emu.tcl
					>vivado.jou
					>vivado.log
					>vivado.pb
					>vpl.tcl
		>logs

			>link  -- Logs from the linking process
				>link.steps.log
				>v++.log
			>mmult.hw_emu.xilinx_u200_xdma_201830_3  -- Logs from the compiltion process
				>mmult.hw_emu.xilinx_u200_xdma_201830_3.steps.log
				>mmult_vitis_hls.log
				>v++.log
			>optraceViewer.html
		>mmult.hw_emu.xilinx_u200_xdma_201830_3  
			>mmult
				>htr.txt
				>ISEWrap.js
				>ISEWrap.sh
				>mmult  -- Vits HLS files used and genrated during compilation
					>hls.app
					>ip
					>kernel.xml
					>kernel.xml.orig
					>mmult.design.xml
					>solution
				>mmult.tcl
				>rundef.js
				>runme.bat
				>runme.log
				>runme.sh
				>vitis_hls.log
				>vitis_hls.pb
			>mmult.hw_emu.xilinx_u200_xdma_201830_3.spr
			>mmult.hw_emu.xilinx_u200_xdma_201830_3.steps.log

		>reports

			>link  -- Reports generated during the linking process
				>system_estimate_mmult.hw_emu.xilinx_u200_xdma_201830_3.xtxt
				>v++_link_mmult.hw_emu.xilinx_u200_xdma_201830_3_guidance.html
			>mmult.hw_emu.xilinx_u200_xdma_201830_3  -- Reports generated during the compilation process
				>hls_reports
				>system_estimate_mmult.hw_emu.xilinx_u200_xdma_201830_3.xtxt
				>v++_compile_mmult.hw_emu.xilinx_u200_xdma_201830_3_guidance.html
		>v++_compile_mmult.hw_emu.xilinx_u200_xdma_201830_3_guidance.json  -- Design guidance generated during compilation

		>v++_compile_mmult.hw_emu.xilinx_u200_xdma_201830_3_guidance.pb

		>v++_link_mmult.hw_emu.xilinx_u200_xdma_201830_3_guidance.json  -- Design guidance generated during linking

		>v++_link_mmult.hw_emu.xilinx_u200_xdma_201830_3_guidance.pb
	>timeline_trace.csv  -- Timeline of events generated by XRT during run time. 

	>v++_mmult.hw_emu.xilinx_u200_xdma_201830_3.log  --  Log file generated from the v++ commands

	>xcd.log

	>xclbin.run_summary  -- secondary run_summary report

	>xilinx_u200_xdma_201830_3-0-mmult.hw_emu.xilinx_u200_xdma_201830_3_simulate.log

	>xilinx_u200_xdma_201830_3-0-mmult.hw_emu.xilinx_u200_xdma_201830_3_xsc_report.log

	>xrc.log

	>xrt.ini