The PYNQ-Z1 board is designed to be used with PYNQ, a new open-source framework that enables embedded programmers to exploit the capabilities of Xilinx Zynq All Programmable SoCs (APSoCs) without having to design programmable logic circuits. Instead, the APSoC is programmed using Python and the code is developed and tested directly on the PYNQ-Z1. The programmable logic circuits are imported as hardware libraries and programmed through their APIs in essentially the same way that the software libraries are imported and programmed.
The PYNQ-Z1 board is the hardware platform for the PYNQ open-source framework. The software running on the ARM A9 CPUs includes: Web server hosting the Jupyter Notebooks design environment, The IPython kernel and packages, Linux, Base hardware library and API for the FPGA. For designers who want to extend the base system by contributing new hardware libraries, Xilinx Vivado WebPACK tools are available free of cost.
To find out more about PYNQ, please see the project webpage at www.pynq.io. Here you will find materials to help you get started and a forum for contacting the supporting community.
Key Features & Benefits
- 220 DSP slices
- 4 clock management tiles, each with a phase-locked loop (PLL) and mixed-mode clock manager (MMCM)
- 630 KB of fast block RAM
- 650MHz dual-core Cortex-A9 processor
- Artix-7 family programmable logic
- DDR3 memory controller with 8 DMA channels and 4 high performance AXI3 slave ports
- High-bandwidth peripheral controllers: 1G Ethernet, USB 2.0, SDIO
- Low-bandwidth peripheral controller: SPI, UART, CAN, I2C
- On-chip analog-to-digital converter (XADC)
- Programmable from JTAG, Quad-SPI flash, and microSD card
- ZYNQ XC7Z020-1CLG400C:
- PYNQ-Z1 Board