Xilinx® Alveo™ U250 Data Center accelerator cards are designed to meet the constantly changing needs of the modern Data Center, providing up to 90X higher performance than CPUs for key workloads, including machine learning inference, video transcoding, and database search & analytics. Built on the Xilinx 16nm UltraScale™ architecture, Alveo accelerator cards are adaptable to changing acceleration requirements and algorithm standards, capable of accelerating any workload without changing hardware, and reducing overall cost of ownership.
Enabling Alveo accelerator cards is an ecosystem of Xilinx and partner applications for common Data Center workloads. For custom solutions, Xilinx’s Application Developer Tool Suite (Vitis™ environment) and Machine Learning Suite provide the tools for developers to bring differentiated applications to market.
Fast - Highest Performance
Adaptable – Accelerate Any Workload
Accessible - Cloud <-> On-Premises Mobility
|INT8 TOPs (peak)||33.3||33.3|
|Width||Dual Slot||Dual Slot|
|Off-chip Memory Capacity||64 GB||64 GB|
|Off-chip Total Bandwidth||77 GB/s||77 GB/s|
|Internal SRAM Capacity||54 MB||54 MB|
|Internal SRAM Total Bandwidth||38 TB/s||38 TB/s|
|Network Interfaces||2x QSFP28 (100GbE)||2x QSFP28 (100GbE)|
|Look-up Tables (LUTs)||1,341,000||1,341,000|
|Power and Thermal|
|Maximum Total Power||225W||225W|
We’ve developed an ecosystem of Xilinx and partner solutions for most common workloads. Alveo Data Center accelerator cards can deliver dramatic acceleration across a broad set of applications and are reconfigurable to provide an ideal fit for the changing workloads of the modern data center. Compare how Alveo Data Center accelerator cards perform compared to traditional CPU architectures.
The preferred optimal design flow for targeting the Alveo Data Center accelerator card uses the Vitis™ software platform. Steps to deploy and develop using Vitis are given below. Long-time FPGA designers might want to use traditional design flows, such as RTL or HLx. This flow does not require installing the Vitis platform.
For development using RTL and HLx, follow these steps: