Virtex 6 FPGA Broadcast Connectivity Kit

by: AMD

Overview

Important Notice

This development kit has been discontinued per PDN advisory XCN19008 and is no longer offered for sale.  The solutions targeted for this product will not be updated moving forward with limited support available from AMD.

Product Description

Quickly evaluate and integrate SD/HD/3G-SDI, AES3 Audio and other interfaces into next-generation broadcast designs. The Virtex 6 FPGA Broadcast Connectivity Kit integrates the high performance of the Virtex 6 FPGA family, IP building blocks, design tools, reference designs, and a serial digital/audio development board. Developed specifically to address the rapidly evolving requirements in the broadcast market for greater bandwidth, improved jitter performance and lower power consumption, the Virtex 6 FPGA Broadcast Connectivity Kit includes a serial digital audio and video connectivity FPGA mezzanine card (FMC).


Key Features & Benefits

  • Hardware, design tools, IP, and pre-verified reference designs
  • Enabling serial connectivity with PCIe Gen2x4, Gen1x8, 1 SFP, 1 SMA Pair, and UART
  • Supports embedded processing with MicroBlaze, soft 32bit RISC
  • 10/100/1000 Tri-Speed Ethernet (RJ-45)
  • DDR3 SO-DIMM (512 MB)
  • Expand I/O with the FPGA Mezzanine Card (FMC) interface

Featured AMD Devices

Featuring the Virtex 6 LX240T FPGA

Logic Cells 241,152
Memory (Kb) 14,976
DSP Slices 3,650
Maximum Transceivers (GTX) 24
Max User I/O 720
virtex-6-bk-chip

Product Information

Specifications

Board Features

Featuring the ML605 Evaluation Board 

virtex-6-ml605-board
What's Inside

What's Inside

ML605 Evaluation Board

Featuring the Virtex 6 LX240T FPGA

ISE™ Design Suite: Embedded Edition

Device-locked to the Virtex 6 LX240T FPGA

Power Adapter

Broadcast connectivity FMC daughter card from Cook Technologies

4 channel SD/HD/3G-SDI Tx & Rx, 2 stereo channel AE, Single stereo channel AES10 Tx & Rx Genlock input and clock cleaner modules

Resources

Documentation

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Training & Support