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Overview

AI Edge Platform

 

 

The Xilinx Edge AI Platform provides comprehensive tools and models which utilize unique deep compression and hardware-accelerated Deep Learning technology.

The platform provides efficient, convenient and economical inference deployments for embedded-CPU-based FPGAs.

The Xilinx AI team consists of renowned researchers and experienced professionals known for their pioneering work in  the field of deep learning.

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DNNDK

DNNDK™ (Deep Neural Network Development Kit)

DNNDK unleashes the productivity and efficiency of deploying AI inference on Xilinx Edge AI platforms.

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Key Features

  • Provides a complete set of  toolchains with compression, compilation, deployment and profiling.
  • Supports mainstream frameworks and the latest models capable of diverse deep learning tasks
  • Provides a lightweight standard C/C++ programming API (no RTL programming knowledge required)
  • Scalable board support from cost-optimized to performance-driven platforms
  • Supports system integration with both SDSoC and Vivado

DNNDK consists of:

  • DEep ComprEssioN Tool (DECENT)
  • Deep Neural Network Compiler (DNNC)
  • Neural Network Runtime (N2Cube)
  • Profiler

DNNDK™ Components

Deep Compression

With world-leading model compression technology, we can reduce model complexity by 5x to 50x with minimal accuracy impact. Deep Compression takes the performance of your AI inference to the next level.

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Deep Neural Network Compiler

 

Maps the AI model to high-efficient instruction set and data flow.  Also performs sophisticated optimizations such as  layer fusion, instruction scheduling, and reuses on-chip memory as much as possible.


N2Cube Runtime and Performance Profiler

The N2Cube runtime provides a lightweight set of tensor-based APIs enabling easy application development. It also provides efficient task scheduling, memory management and interrupt handling. The performance profiler allows programmers to perform in-depth analysis of the efficiency and utilization of your AI inference implementation.

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Hardware Architecture

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Aristotle Architecture

 

The Deep-learning Processing Unit (DPU) is designed to be efficient, have low latency and be scalable for a wide range of edge AI applications. It supports the most commonly used network layers and operators, using hardware acceleration to take full advantage of the underlying Xilinx FPGA architecture and achieve the optimal tradeoff between latency, power and cost.

Frameworks

Frameworks

Xilinx Edge AI Platform supports a number of industry-standard frameworks, highlighted in the table below.

Framework Description Availability
TensorFlow is an open-source framework developed by Google.
CAFFE is an open-source framework developed at UC Berkeley.
Darknet is an open-source framework developed by Joseph Redmon.
Models

Models

The Xilinx Edge AI Platform supports the AI/ML Models as shown below.

 

Application Task Algorithm
General Image classification Resnet50, Inception v1, BN-inception, VGG16, SqueezeNet, MobilenetV2
Object Detection MobilnetV2-SSD, SSD, YOLO v2,     YOLO v3, Tiny YOLO v2, Tiny YOLO v3
Segmentation ENet, ESPNet
Face Face detection SSD, Densebox
Landmark Localization Coordinates Regression
Face recognition ResNet + Triplet / A-softmax Loss
Face attributes recognition Classification and regression
Pedestrian Pedestrian Detection SSD
Pose Estimation Coordinates Regression
Video Analytics Object detection SSD, RefineDet
Pedestrian Attributes Recognition GoogleNet
Car Attributes Recognition GoogleNet
Car Logo Recognition Modified Densebox + GoogleNet
License Plate Detection Modified DenseBox
License Plate Recognition GoogleNet + Multi-task Learning
ADAS/AD Object Detection SSD, YOLOv2, YOLOv3
Lane Detection VPGNet
Semantic Segmentation FPN
Getting Started

Getting Started

For a full list of documentation, downloads and other useful resources, please navigate to the Edge AI Developer Hub.

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