Club Vivado Users Group 2016 Registration

bnr-vivado_2016

Join over 1,000 of your fellow design engineers and key Xilinx technologists for this free event to be held in 9 locations worldwide, where you will learn techniques, tips, and tricks to improve your  FPGA design productivity:

  •  Keynote presentation covering industry trends and Xilinx technology benefits.
  •  Technical presentations by the Xilinx user community.
  •  Open panel discussion with Vivado development experts.
  •  Vivado technology presentations, including timing closure and UltraFAST™ methodology recommendations.

Any questions please contact clubv@xilinx.com

 

Registration
City Date Venue  Address 
Tokyo Sept 16 Tokyo Conference Center Shinagawa

Area Shinagawa 3rd,4th&5th Floor
1-9-36 Konan, Minato-ku
Tokyo, 108-0075 Japan

>>Registration closed.  No more seats available.

Beijing Sept 20 

Crown Plaza Beijing Zhongguancun

No. 106 Zhi Chun Road Hai Dian, District, Beijing
Beijing - 100086, China

>>Registration closed.  No more seats available.

Shanghai Sept 22

Shanghai Pudong Intercontinental Hotel

No.777 Zhangyang Road, Pudong,
Shanghai, China 200120

>>Registration closed.  No more seats available.

Seoul Sept 27 JW Marriott Seoul Hotel 

176 Sinbanpo-ro, Seocho-gu,
Seoul, South Korea

>> Registration closed.  No more seats available.

Eindhoven  Oct 18 Novotel

Anthony Fokkerweg 101, 5657 EJ Eindhoven
Netherlands

>>Registration closed.  No more seats available.

Stuttgart Oct 20 Stuttgart Marriott Hotel Sindelfingen

Mahdentalstrasse 68, Sindelfingen
Baden-Wurttemberg 71065 Germany

>>Registration closed.  No more seats available.

Bangalore Oct 25 Vivanta

41/3 MG Road , Bangalore
Karnataka - 56000 India

>>Registration closed.  No more seats available.

San Jose Nov 3 DoubleTree Hilton

2050 Gateway Pl, San Jose, CA 95110

>>Registration closed.  No more seats available.

Washington, DC Nov 10  Marriott Bethesda

5151 Pooks Hill Rd, Bethesda, MD 20814

>> Register now

Event Schedule & Agenda
Time Agenda
8:30-9:00 Registration & Breakfast
9:00-9:10 Welcome & Introductions
9:10-9:55 Keynote Presentation
9:55-10:40 Xilinx Presented Topic: Timing Closure/Synthesis Presentation
10:40-11:10 Speak to the Experts Interactive Break
11:10-11:40 Customer Presentation
11:40-12:10 Customer Presentation
12:10-1:10 Lunch Break
1:10-1:40 Expert Panel Discussion
1:40-2:25 Xilinx Presented Topic:  HLx Methodology Presentation
2:25-2:55 Customer Presentation
2:55-3:25 Speak to the Experts Interactive Break
3:25-4:10 Xilinx Presented Topic: IP Design and Verification
4:10-4:15 Survey  / Closing / Thank you
4:15-5:00 Awards & Networking Happy Hour