Blockchain Hardware Accelerator

  • Part Number: BA452
  • Vendor: Silex Insight
  • Certified Partner
  • Application Partner

Product Description

Blockchain has a wide range of applications on the internet. As it is decentralized by design, it is an alternative to the many traditional transactional systems. In order for a blockchain system to be viable (scalability, interoperability and sustainability), the complex and time/power consuming cryptographic operations associated with the blockchain should be offloaded to an accelerating system. Our solution is a secure public key infrastructure engine that can be used to offload compute-intensive public key operations such as signature generations and verifications.

The blockchain hardware accelerator uses a combination of a load dispatcher and a configurable number of instances of our Public Key Crypto Engine (BA414EP). This saves time and space as the transaction load is distributed among several components, thereby increasing the overall transaction speed and output. The architecture allows for high performance offloading and supports all the cryptography algorithms such as ECC. ECDSA operations that are used by popular blockchain applications like Ethereum, Ripple and Bitcoin and Hyperledger are supported next to EdDSA using the Edwards25519 curve as used in the Libra blockchain. 

The Blockchain hardware accelerator is ideal for:

  • Digital (crypto) currency
  • Transaction verification
  • Governance
  • Healthcare
  • Online voting
  • Data storage
  • IoT
  • Insurance

Key Features and Benefits

  • Wide variety of ECC curves supported (Weierstrass, Edwards, Montgomery, Twisted-Edwards, …)

Featured Documents

Device Implementation Matrix

Device utilization metrics for example implementations of this core. Contact provider for more information.

Family Device Speed Grade Tool Version HW Validated? Slice LUT BRAM DSP48 CMT GTx FMAX (Mhz)
VIRTEX-UP Family XCVU9P -2 Vivado 2018.3 363084 353066 492 2256 0 0 400

IP Quality Metrics

General Information

This Data was Current On Nov 26, 2019
Current IP Revision Number 2.7
Date Current Revision was Released Aug 26, 2019
Release Date of First Version Aug 26, 2019

Production Use by Xilinx Customers

Number of Successful Xilinx Customer Production Projects 0
Can References be Made Available? N


IP Formats Available for Purchase Netlist, Source Code
Source Code Format(s) VHDL
High-Level Model Included? N
Integration Testbench Provided Y
Integration Test Bench Format(s) VHDL
Code Coverage Report Provided? N
Functional Coverage Report Provided? N
UCFs Provided? XDC
Commercial Evaluation Board Available? Y
FPGA Used on Board Virtex UltraScale+
Software Drivers Provided? N


Code Optimized for Xilinx? N
Custom FPGA Optimization Techniques None
Synthesis Software Tools Supported/Version Synplicity Synplify; Vivado Synthesis
Static Timing Analysis Performed? Y
IP-XACT Metadata Included? Y


Is a Document Verification Plan Available? Executable and documented plan
Test Methodology Both
Assertions N
Coverage Metrics Collected Functional
Timing Verification Performed? Y
Timing Verification Report Available Y
Simulators Supported Cadence NC-Sim; Mentor ModelSIM; Synopsys VCS; Xilinx lSim

Hardware Validation

Validated on FPGA Y
Hardware Validation Platform Used VCU1525 DevKit
Industry Standard Compliance Testing Passed N
Are Test Results Available? N