logiVIEW Multiview 3D Video Transformation Engine

  • Part Number: logiVIEW
  • Vendor: Xylon d.o.o.
  • Premier Partner

Product Description

The logiVIEW Multiview 3D Video Transformation Engine IP core is designed for high-performance and real-time processing of multiple video streams or still images. It removes fish eye distortions caused by extreme wide-angle Field Of View (FOV) lenses and makes complex homographic transformations, including perspective corrections, to the captured video. The logiVIEW IP core can also execute complex arbitrary non-homographic transformations, such as video texturing on curved planes, which is a key feature for 3D Surround View parking assistance and similar multi-camera video and vision applications. The logiVIEW IP core can be used in different industries and applications, i.e. medical endoscopy, pipe inspection, surveillance, automotive surround view and lane departure warning driver assistance systems, defense, etc.

Key Features and Benefits

  • 4. Up to eight (8) inputs and outputs with resolutions up to 2048x2048
  • 2. Supports any non-homography transformation, such as video texturing on curved planes
  • 3. Supports correction of fish eye lens distortions (Suitable for extreme wide-angle lenses)
  • 1. Supports arbitrary combinations of homography trasformations on multiple video inputs
  • 6. Packaged for AMD Vivado Design Suite
  • 5. Key IP core for multi-camera parking assistance ADAS and similar

Featured Documents

Device Implementation Matrix

Device utilization metrics for example implementations of this core. Contact provider for more information.

Family Device Speed Grade Tool Version HW Validated? Slice LUT BRAM DSP48 CMT GTx FMAX (Mhz)
Zynq-UP-MPSoC Family XCZU9EG -1 Vivado 2019.2 Y 0 14310 46 86 0 0 200

IP Quality Metrics

General Information

This Data was Current On Jun 24, 2023
Current IP Revision Number 5.2
Date Current Revision was Released Sep 01, 2020
Release Date of First Version Jun 04, 2010

Production Use by Xilinx Customers

Number of Successful Xilinx Customer Production Projects 40
Can References be Made Available? N


IP Formats Available for Purchase Bitstream, Netlist, Source Code
Source Code Format(s) VHDL
High-Level Model Included? N
Integration Testbench Provided Y
Integration Test Bench Format(s) VHDL
Code Coverage Report Provided? N
Functional Coverage Report Provided? N
UCFs Provided? UCF
Commercial Evaluation Board Available? Y
Software Drivers Provided? Y
Driver OS Support Linux, Non-OS specific


Code Optimized for Xilinx? Y
Standard FPGA Optimization Techniques Inference, Instantiation
Custom FPGA Optimization Techniques None
Synthesis Software Tools Supported/Version Xilinx XST
Static Timing Analysis Performed? Y
AXI Interfaces AXI4
IP-XACT Metadata Included? N


Is a Document Verification Plan Available? Yes, document only plan
Test Methodology Directed Testing
Assertions Y
Coverage Metrics Collected None
Timing Verification Performed? Y
Timing Verification Report Available N
Simulators Supported Mentor ModelSIM

Hardware Validation

Validated on FPGA Y
Hardware Validation Platform Used logiADAK ADAS Development Kit
Industry Standard Compliance Testing Passed N
Are Test Results Available? N