Hardent’s DSC v1.1 Encoder IP Core implements video stream compression functionality compliant with the VESA Display Stream Compression (DSC) v1.1 standard. The DSC algorithms enable visually lossless compression for high-definition applications in the broadcast video, pro A/V, automotive, medical and consumer electronics industries. Applications include video, graphics and display processors, video transport, display monitors, televisions, and DSC standard compliance test and measurement equipment.
The VESA DSC compression standard is compatible with several transport standards including MIPI DSI 1.2, VESA Embedded DisplayPort 1.4a and DisplayPort 1.4. The current release is delivered as a Verilog synthesized gate level netlist supporting a maximum resolution of 720p60 (FHD).
Additional resolutions such as 4K (4096x2160), 5K (UHD+) and 8K (FUHD), as well as a DSC Decoder IP Core and other target FPGA technologies, are available upon request. Please contact Hardent for further information.
Key Features and Benefits
- 3:1 and 2:1 compression
- 8 and 10 bits video components
- Additional display resolutions available upon request, including 1080p60 (FHD), 4K (4096x2160), 5K (UHD+) and 8K (FUHD)
- Current release provides support for a maximum resolution of 720p60 (FHD)
- IP provided with comprehensive DSC Encoder wrapper and example integration testbench
- Output buffering compatible with transport stream over video interfaces
- Resilient to bitstream corruption
- Source code verified against the VESA DSC 1.1 C model using a comprehensive test image library
- Supports all VESA DSC 1.1 mandatory and optional encoding mechanisms
- YCbCr and RGB 4:4:4 video input format