The HATI (High Accuracy Timing IP) is an FPGA core intended to provide sub-nanosecond synchronization accuracy by using 1/10 Gbps optical fiber links. The core is based on IEEE-1588, Sync-E and precise clock compensation to achieve subnano error levels. It doesn’t need any specific hardware and doesn’t interfere in the regular 1/10G traffic.
This Data was Current On | Sep 02, 2020 |
Current IP Revision Number | 2.0 |
Date Current Revision was Released | Sep 08, 2018 |
Release Date of First Version | May 08, 2018 |
Number of Successful Xilinx Customer Production Projects | 2 |
Can References be Made Available? | N |
IP Formats Available for Purchase | Netlist |
Source Code Format(s) | VHDL |
High-Level Model Included? | N |
Model Formats | C |
Integration Testbench Provided | Y |
Integration Test Bench Format(s) | VHDL |
Code Coverage Report Provided? | N |
Functional Coverage Report Provided? | N |
UCFs Provided? | XDC |
Commercial Evaluation Board Available? | Y |
FPGA Used on Board | Zynq UltraScale+ MPSoC |
Software Drivers Provided? | Y |
Driver OS Support | Y |
Code Optimized for Xilinx? | N |
Custom FPGA Optimization Techniques | None |
Synthesis Software Tools Supported/Version | Xilinx XST |
Static Timing Analysis Performed? | N |
AXI Interfaces | AXI4, AXI4-Lite |
IP-XACT Metadata Included? | Y |
Is a Document Verification Plan Available? | Yes, document only plan |
Test Methodology | Directed Testing |
Assertions | N |
Coverage Metrics Collected | Code |
Timing Verification Performed? | Y |
Timing Verification Report Available | Y |
Simulators Supported | Xilinx lSim |
Validated on FPGA | N |
Industry Standard Compliance Testing Passed | N |
Are Test Results Available? | N |