NVMe Host Accelerator (NVMeHA)

Overview

Product Description

The Xilinx NVMe Host Accelerator (NVMeHA) IP provides a simple and efficient interface to multiple NVMe drives, thereby offloading the MPSoC / FPGA embedded CPU from IO queue management, enabling a high throughput low latency storage solution. The IP provides a path for either software or hardware module(s) to interface with it's standard AXI memory map and streaming interfaces. The NVMeHA IP is fully parametrizable for customization, and comes with a software driver that can run in the ARM embedded CPU in the MPSoC or in a soft-IP Microblaze CPU on an FPGA.


Key Features and Benefits

  • Submission Queue (SQ) doorbell management across multiple queues
  • Completion Queue (CQ) doorbell management across multiple queues
  • Building NVMe spec compliant submission queue command entry
  • Completion queue entry parsing

IP Performance and Resource Utilization Data


Support

Documentation

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