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Video Warp Processor

Overview

Product Description

The Xilinx® LogiCORE™ IP Video Warp Processor core provides a video processing block, that warps input video frames to generate warped output video frames. It has a memory interface for input and output. This IP core supports keystone, pincushion, barrel, arbitrary, scaling, rotation, and translation distortions. This highly configurable IP core supports the ability of in-system programming through a comprehensive register interface to control it. A comprehensive set of interrupt status bits are provided for monitoring the processor.


Key Features and Benefits

  • Memory mapped AXI4 Interface
  • Supports Keystone, Pincushion, Barrel and Arbitrary distortions
  • Supports 0.5 – 2.0 scaling
  • Supports up to 90° rotation
  • Supports translation up to the source image boundaries
  • Supports spatial resolutions from 320 × 240 up to 3840 × 2160   
  • Supports RGB 8-bit, 10-bit and 12-bit per color component on memory interface
  • Dynamically configurable source and destination buffer addresses
  • Supports up to 4k 60 fps, depending on the device family
  • Supports 32-bit and 64-bit DDR memory address access
  • Supports 32, 64, 128 AXI4 Memory Interface data widths
  • Supports bilinear & bicubic filters for moderate and high quality output.

Support

Documentation

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