The customizable Integrated Logic Analyzer (ILA) IP core is a logic analyzer core that can be used to monitor the internal signals of a design. The ILA core includes many advanced features of modern logic analyzers, including Boolean trigger equations, and edge transition triggers. Because the ILA core is synchronous to the design being monitored, all design clock constraints that are applied to your design are also applied to the components inside the ILA core.
Key Features and Benefits
- User-selectable trigger width, data width, and data depth
- Multiple probe ports, which can be combined into a single trigger condition
- AXI Interface on ILA IP core to debug AXI IP cores in a system
- For more information about the ILA core, see the Vivado Design Suite User Guide: Programming and Debugging