Memory Interface is a free software tool used to generate memory controllers and interfaces for Xilinx® FPGAs. Memory Interface generates unencrypted Verilog or VHDL design files, UCF constraints, simulation files and implementation script files to simplify the design process. Memory Interfaces supported are: DDR3 SDRAM, DDR2 SDRAM, QDRII SRAM, and DDRII SRAM, LP DDR, QDRII+ SRAM, and RLDRAM II.
Key Features and Benefits
Memory Interface generates through a Graphic User Interface the unencrypted Verilog or VHDL design files, UCF constraints, and simulation script files to simplify the memory interface design process.
Memory modules (DIMM) are supported for DDR3, DDR2 and DDR SDRAMs.