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Video Scene Change Detection

Overview

Product Description

The Xilinx® Video Scene Change Logicore IP provides a video processing block that implements scene change detection algorithm. The IP core calculates a histogram on a vertically subsampled luma frame for consecutive frames. The histograms of these frames are then compared using the Sum of Absolute differences (SAD). Its commonly used to improve Video encoding during scene changes. Its also used for applications such video indexing and sematic segmentation in a scene. This highly configurable IP core supports in-system programmability through a comprehensive register interface to control it.  This Xilinx® LogiCORE™ IP module is provided at no additional cost with the Xilinx Vivado® Design Suite.


Key Features and Benefits

  • Input streams can be read from memory mapped AXI4 interface or from AXI4-Stream interface
  • Supports upto 8 streams in the memory mapped mode and 1 stream in the stream mode
  • Supports Y8 and Y10 formats for memory interface
  • Supports RGB, YUV 444, YUV 422, and YUV 420 formats for stream interface

 

  • Supports 8, 10, 12, and 16 bits per color component input and output on stream or memory interface
  • Supports one, two, or four pixel-width
  • Supports spatial resolutions ranging from 64 × 64 upto 8,192 × 4,320
  • Supports up to 8K 30 fps, depending on device target

Resource Utilization


Support

Documentation

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