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XPS General Purpose IO

Overview

Product Description

This document describes the specifications for the General Purpose Input/Output (GPIO) core for the Processor Local Bus (PLB). The XPS GPIO is a 32-bit peripheral that attaches to the PLB.


Key Features and Benefits

  • PLB interface is based on PLB v4.6 specification
  • Configurable as single or dual GPIO channel(s)
  • Number of GPIO bits configurable from 1 to 32 bits
  • Each GPIO bit can be dynamically programmed as input or output
  • Can be configured as inputs-only on a per channel basis to reduce resource utilization
  • Ports for both 3-state and non 3-state connections

Support

Documentation

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