The Versal™ AI Edge series delivers 4X AI performance/watt vs. leading GPUs1 for real-time systems in automated driving, predictive factory and healthcare systems, multi-mission payloads in aerospace & defense, and a breadth of other applications. More than just AI, the Versal AI Edge series accelerates the whole application from sensor to AI to real-time control, all with the highest levels of safety and security to meet critical standards such as ISO 26262 and IEC 61508. As an adaptive compute acceleration platform (ACAP), the Versal AI Edge series allows developers to rapidly evolve their sensor fusion and AI algorithms while leveraging the world’s most scalable device portfolio for diverse performance and power profiles from edge to endpoint.
1: Versal AI Edge VE2802 vs. Jetson AGX Xavier (MAX N-Mode), ResNet50 224x224, batch=1
Scalar Engines deliver power-efficient embedded compute with the safety and security required in real-time systems. The dual-core Arm® Cortex®-A72 application processor is ideal for running Linux-class applications, while the dual-core Arm Cortex-R5F real-time processor runs safety-critical code for the highest levels of functional safety (ASIL and SIL). The platform management controller (PMC) is based on a triple-redundant processor and manages device operation, including platform boot, advanced power and thermal management, security, safety, and reliability across the platform.
At the heart of the Versal architecture’s flexibility is its Adaptable Engines, enabling the integration of any sensor, connectivity to any interface, and the flexibility to handle any workload. Capable of both parallelism and determinism, Adaptable Engines can implement and adapt sensor fusion algorithms, accelerate pre- and post-data processing across the pipeline, implement deterministic networking and motor control for real-time response, isolate safety-critical functions for fail-safe operation, and allow for hardware redundancies and fault resilience.
Consisting of both AI Engines and DSP Engines, Intelligent Engines support a breadth of workloads common in edge applications including AI inference, image processing, and motion control. AI Engines are a breakthrough architecture based on a scalable array of vector processors and distributed memory, delivering breakthrough AI performance/watt. DSP Engines are based on the proven slice architecture in previous-generation Zynq® adaptive SoCs, now with integrated floating-point support, and are ideal for wireless and image signal processing, data analytics, motion control, and more.
Versal ACAPs were built from the ground up to meet the most stringent safety requirements in industrial and automotive applications, including ISO 26262 and IEC 61508 for safety, and IEC 62443 for security. The Versal architecture is partitioned with safety features in each domain, as well as global resources to monitor and eliminate common cause failures. New security features over previous-generation adaptive SoCs improve protection against cloning, IP theft, and cyber-attacks, including higher bandwidth AES & SHA encryption/decryption, glitch detection, and more.
The accelerator RAM features 4MB of on-chip of memory. The memory block is accessible to all compute engines and helps eliminate the need to go to external memory for critical compute functions such as AI inference. This enhances the already flexible memory hierarchy of the Versal architecture and improves AI performance/watt. The accelerator RAM is also ideal for holding safety-critical code that exceeds the capacity of the real-time processor’s OCM, improving the ability to meet ASIL-C and ASIL-D requirements.
Versal ACAP’s programmable I/O allows connection to any sensor or interface, as well as the ability to scale for future interface requirements. Designers can configure the same I/O for either sensors, memory, or network connectivity, and budget device pins as needed. Different I/O types provide a wide range of speeds and voltages for both legacy and next generation standards, e.g., 3.2Gb/s DDR for server-class memory interfacing, 4.2Gb/s LPDDR4x for highest memory bandwidth per pin, and native MIPI support to handle up to 8-megapixel sensors and beyond—critical to Level-2 ADAS and above.
AI compute performance is a key requirement for automotive tier-1s and OEMs targeting SAE Level 3 and beyond, in addition to meeting stringent thermal, reliability, security, and safety requirements. The Versal AI Edge series was architected for the highest AI performance/watt in power- and thermally-constrained systems. As a heterogeneous compute platform, Versal AI Edge ACAPs match the right processing engine to the workload across the vehicle: custom I/O for any needed combination of radar, LiDAR, infrared, GPS, and vision sensors; Adaptable Engines for sensor fusion and pre-processing; AI Engines for inference and perception processing; and Scalar Engines for safety-critical decision making. Versal AI Edge ACAPs are part of the Xilinx automotive-qualified (XA) product portfolio and are architected to meet stringent ISO 26262 requirements.
Robotics integrate precision control, deterministic communications, machine vision, responsive AI, cybersecurity, and functional safety into a single ‘system of systems.' Versal AI Edge ACAPs enable a modular and scalable approach to robotics by providing a single heterogeneous device for fusion of heterogeneous sensors for robotic perception, precise and deterministic control over a scalable number of axes, isolation of safety-critical functions, accelerated motion planning, and AI to augment safety controls for dynamic, context-based execution. The Versal AI Edge series also accelerates real-time analytics with machine learning to support predictive maintenance and deliver actionable insights via cybersecure (IEC 62443) network connectivity.
The Versal AI Edge series is optimized for real-time, high-performance applications in the most demanding environments such as multi-mission drones and UAVs. A single Versal AI Edge device can support multiple inputs including comms datalinks, navigation, radar for target tracking and IFF (Identification Friend or Foe), and electro-optical sensors for visual reconnaissance. The heterogeneous engines aggregate and pre-process incoming data and sensor input, perform waveform processing and signal conditioning, and ultimately perform low latency AI for target tracking and optimization of flight paths, as well as cognitive RF to identify adversarial signals or channel attacks. The Versal AI Edge series delivers both the intelligence and low-SWaP (size, weight, and power) needed for multi-mission situationally aware UAVs.
Requirements are increasing to make medical devices smaller, portable, and battery driven, targeting more Point-of-Care applications, all without compromising patient safety while still satisfying regulatory requirements. The Versal AI Edge series accelerates parallel beamforming and real-time image processing to create higher quality images and analysis, but with the power efficiency for long life, battery-powered portable ultrasound units. As a heterogeneous compute platform, the Versal AI Edge series implements all the different structures across the pipeline. Adaptable Engines perform acquisition functions including control of the analog front-end. AI Engines accelerate advanced imaging techniques, as well as machine learning for diagnostic assistance and efficiency improvements. The Arm® subsystem hosts the Linux-class OS for orchestrating, updating, and providing infrastructure across the data pipeline. The Versal AI Edge series allows for scalability from portable, to desktop, to cart-based ultrasound solutions. Learn More
|Application Processing Unit||Dual-core Arm® Cortex®-A72, 48KB/32KB L1 Cache w/ parity & ECC; 1 L2 Cache w/ ECC|
|Real-Time Processing Unit||Dual-core Arm Cortex-R5F, 32KB/32KB L1 Cache, and 256KB TCM w/ECC|
|Memory||256KB On-Chip Memory w/ECC|
|Connectivity||Ethernet (x2); UART (x2); CAN-FD (x2); USB 2.0 (x1); SPI (x2); I2C (x2)|
|System Logic Cells||44K||80K||230K||329K||820K||981K||1,139K|
|Accelerator RAM (Mb)||32||32||32||32||0||0||0|
|Total Memory (Mb)||46||54||86||103||243||253||263|
|NoC Master / NoC Slave Ports||2||2||5||5||21||21||21|
|CCIX & PCIe® w/ DMA (CPM)||-||-||-||-||1||1||1|
|40G Multirate Ethernet MAC||0||0||1||1||2||2||2|
From solution planning to system integration and validation, Xilinx provides tailored views of the extensive list of Versal™ ACAP documentation to maximize the productivity of user designs. Visit the Versal ACAP design hub to get the latest content for your design needs.
The Versal™ AI Edge series is currently in Early Access. Contact your local Xilinx sales representative to apply for the Early Access program or visit the Contact Sales page. Leverage the resources below to learn more about design tools and design methodologies for the Versal ACAP architecture.
With an inherently software programmable silicon infrastructure, the Versal ACAP is designed from the ground up to be software-centric. The enhanced Xilinx® Vivado® Design Suite introduces a new system design methodology and development environments such as traffic analyzer, NoC compiler, data flow modeling, and more. A high-speed, unified, cohesive debug environment accelerates debug and trace across Scalar, Adaptable, and Intelligent Engines.
Download Vivado Design Suite >
The Xilinx Vitis™ unified software platform provides comprehensive core development kits, libraries that use hardware-acceleration technology. The platform provides an efficient, convenient, and unified software environment from the cloud to the edge. As a proud member of the opensource community, the Vitis unified software platform is free and offers an extensive set of open-source, performance-optimized libraries that offer out-of-the-box acceleration with minimal to zero code changes to your existing applications.
Download Vitis Unified Software Platform >
Designers who are targeting a Versal AI Edge device can get started now with the Versal AI Core VCK190 Evaluation Kit. Versal AI Edge devices are based on the same architecture as the Versal AI Core series, with common architectural blocks such as Scalar Engines (Arm® processing subsystem), Adaptable Engines (programmable logic), AI Engines*, network on chip (programmable NoC), and connectivity blocks including PCIe® and DDR4. The evaluation kit has everything you need to jump-start your design, including the ability to perform system testing, evaluate key interfaces, and adopt the ACAP design methodology. Versal AI Edge ACAP Evaluation Kits will be available in the 2nd half of 2022.
*AI Engines are available in the VE1752 device; all other Versal AI Edge devices feature AI Engine-ML.
Xilinx training and learning resources provide the practical skills and fundamental knowledge you need to be fully productive in your next development project.
Getting Started with the Xilinx Versal™ ACAP Platform
Designing with the Versal ACAP: Architecture and Methodology
Designing with the Versal ACAP: Programmable Network on Chip
Designing with Versal AI Engine 1 - Architecture and Design Flow
Designing with Versal AI Engine 2 - Graph Programming with AI Engine Kernels
Designing with Versal AI Engine 3 – Kernel Programming and Optimization
From solution planning to system integration and validation, Xilinx provides tailored views of the extensive list of Versal ACAP documentation to maximize the productivity of user designs. Visit the Versal ACAP design hub to get the latest content for your design needs.