Introducing the Versal™ Premium VP1902 Adaptive SoC
Overview
Industry-Leading Capacity1 & Connectivity
- 2X2 capacity with 18.5M logic cells*
- 2X3 I/O bandwidth for chip-to-chip interfacing*
- 2.3X4 transceiver bandwidth with 112G PAM-4*
Optimized for Emulation and Prototyping
- Up to 2X5 performance at system level*
- Versal™ architecture unlocks up to 8X6 debug performance
- Scalable to support 60B+7 gate designs
Comprehensive Tools and IP
- Co-optimized with Vivado™ design suite
- Novel place-and-route tuned for multi-SLR designs
- IP supporting debug and multi-device designs
* Relative to Virtex™ UltraScale+™ VU19P FPGA
ADVANCING TECHNOLOGIES WITH EMULATION & PROTOTYPINg
Validate Groundbreaking Technologies in the Virtual World
Find out how the AMD Versal™ Premium VP1902 adaptive SoC enables the advancement of new technologies and helps push the boundaries of what’s possible.
LEADING THE WAY FOR INNOVATION
Confidently Emulate with Proven Technology
Discover how over 17 years of experience designing emulation-class devices empowers chip makers to get next-gen ASIC and SoC designs—and the game-changing technologies they power—to market fast.
DELIVERING BREAKTHROUGH HARDWARE
Capitalize on the World’s Largest Adaptive SoC1
Learn how the AMD Versal Premium VP1902 adaptive SoC enables scalability with extremely high capacity and connectivity, enhances routability and low latency, and speeds up design iteration.
applications
To design the ASICs and SoCs of tomorrow, engineers need emulation and prototyping systems that can adapt to meet a range of requirements. With the world's highest capacity1 and 2X the connectivity of prior generation devices3,5, the VP1902 is an ideal building block that can scale from a single-device desktop prototyping system all the way to the massive emulation platforms developed by top electronic design automation (EDA) vendors.
Emulation and Enterprise Prototyping
Enables large, high-performance emulation and prototyping platforms
Traditional and Desktop Prototyping
Provides an extensive debug and IP ecosystem for traditional, desktop, and IP prototyping
Test and Measurement
Offers tremendous logic capacity, I/O performance, and signal processing bandwidth for next-generation instrumentation
Get Started
- Based on AMD internal analysis in May 2023 with a 6-input LUT count to compare the Versal Premium VP1902 device versus the Intel Stratix 10 GX 10M FPGA. (VER-002)
- Based on AMD internal analysis in May 2023, comparing the number of system logic cells of the Versal Premium VP1902 device versus the Virtex UltraScale+ VU19P device. (VER-001)
- Based on AMD Labs testing using an A6865 package to simulate the XPIO data rate performance of an AMD Versal Premium VP1902 device versus the published data rate of an AMD Virtex UltraScale+ VU19P FPGA. Actual results will vary. (VER-003)
- Based on AMD Labs calculation in May 2023 of aggregate transceiver bandwidth of a Versal Premium VP1902 device B6865 package versus a Virtex UltraScale+ VU19P device B3824 package, assuming GTY/GTYPs running at 32G and GTMs running at 56G. (VER-005)
- Based on AMD internal system clock performance analysis in May 2023, comparing the Versal Premium VP1902 device to the Virtex UltraScale+ VU19P device across a range of design sizes and cut nets. (VER-006)
- Based on AMD internal analysis in May 2023, comparing the readback/writeback performance of an AMD Versal adaptive SoC CFI interface versus an AMD Virtex UltraScale+ FPGA ICAP interface. Actual performance will vary. (VER-004)
- Based on AMD Labs projection in May 2023 of 2X capacity compared to prior generation Virtex UltraScale+ VU19P FPGA emulation & prototyping platforms. (VER-007)
- Based on AMD internal analysis, May 2023. (VER-009)