Three scalar processors types are available in Versal ACAPs to support diverse application needs. The application processing unit is ideal for complex applications supported by an OS, and the real-time processing unit is ideal for applications which need low latency, determinism, and real-time control. A separate platform management controller manages system boot, security, and debug.
Programmable logic enables the development of custom computational blocks for ever-changing algorithms. The rearchitected logic in Versal ACAPs provides 4X density per CLB, reducing the need for costly global routing. Loaded with a wide variety of memory elements and tightly coupled with programmable I/O, the adaptable engines allow users to create powerful accelerators for any application.
Enhanced DSP engines provide support for new operations and data types, including single and half-precision floating point and complex 18x18 operations. With backwards compatibility to UltraScale+™ designs, users can continue to leverage existing libraries and IP or update their designs to capture the improved compute performance enabled by this new architecture.
The Versal Prime series combines PCIe® Gen4 compliance, CCIX support, high performance GPIO, and multirate Ethernet MACs supporting various ethernet configurations to maximize connectivity and flexibility. Additionally, Versal Prime series devices feature rearchitected low latency 32.75Gb/s transceivers, and certain devices support 58Gb/s PAM4 transceivers.
Each integrated DDR memory controller provides up to 34.1GB/s of bandwidth with DDR4 and LPDDR4 support and is optimized for both linear and random traffic. In combination with the programmable Network on Chip, these integrated controllers eliminate the need for soft implementations in the programmable logic, saving development time and logic resources.
The programmable Network on Chip (NoC) provides an optimized multi-terabit interconnect between the different compute engines and integrated IP blocks present in the Versal ACAP architecture, simplifying timing closure and saving logic resources. The NoC compiler provides a streamlined programming experience while allowing users to manage latency and QoS, ensuring that critical data paths are prioritized.
With the dawn of AI and the explosion of data generated by modern applications, traditional compute has become an increasingly precious resource in the data center. One solution to preserve compute is to add accelerators to storage controllers and endpoints to offload compression and other common tasks from the primary processor. The Versal Prime series combines PCIe® Gen4 support, powerful Arm® scalar processing engines, integrated memory controllers, and next-generation programmable logic to reduce system-level bottlenecks and increase efficiency.
FPGAs and SoCs have long played a key role in accelerating data center applications by offloading common networking functions such as encryption/decryption and virtual switching from the central processor in a system, preserving compute cycles. Versal ACAPs further accelerate data center systems by combining PCIe Gen4 support, next-generation serdes, and a multirate Ethernet MAC with powerful heterogeneous compute engines to both offload networking operations and supplement the compute available in a server with additional inline processing.
As 5G is emerging, the demand for high-bandwidth connectivity requires access networks to adapt to support new protocols, such as eCPRI, while still maintaining compatibility with existing standards. The combination of adaptable engines with industry-leading SerDes and Ethernet technology in the Versal Prime series gives operators processing power needed to handle 5G throughput requirements while maintaining legacy standard support and reducing total cost of ownership.
As competition from wireless services increases, cable broadband providers must scale their networks and deliver higher bandwidth service to remain competitive. The Versal Prime series offers twice the programmable logic as existing MPSoC devices, powerful Arm scalar processing engines, greater SerDes density, integrated Ethernet IP blocks, and thermally optimized packaging to enable low power, efficient designs without compromising performance.
The massive explosion in bandwidth that accompanies the latest communications standards makes it challenging for test equipment vendors to keep pace with market demands. With support for 58G transceivers and multirate Ethernet MACs, the Versal Prime series offers high-performance data handling and analysis for wired communication testers. The Programmable NoC and integrated memory controllers enable fast and efficient data movement for complex test algorithms.
|Application Processing Unit||Dual-core Arm® Cortex®-A72, 48KB/32KB L1 Cache w/ parity & ECC; 1MB L2 Cache w/ ECC|
|Real-time Processing Unit||Dual-core Arm Cortex-R5F, 32KB/32KB L1 Cache, and 256KB TCM w/ECC|
|Memory||256KB On-Chip Memory w/ECC|
|Connectivity||Ethernet (x2); USB 2.0 (x1); UART (x2); SPI (x2); I2C (x2); CAN-FD (x2)|
|System Logic Cells (K)||352||572||1,002||797||1,663||1,968||2,030||1,263||1,805||2,154|
|NoC Master / NoC Slave Ports||5||16||16||14||22||28||28||16||26||26|
|DDR Memory Controllers||1||2||4||2||2||4||5||6||6||6|
|CCIX & PCIe® w/ DMA (CPM)||-||-||-||1 x Gen4x16, CCIX||1 x Gen4x16, CCIX||1 x Gen4x16, CCIX||1 x Gen4x16, CCIX||1 x Gen4x16, CCIX||1 x Gen4x16, CCIX||1 x Gen4x16, CCIX|
|PCIe||1 x Gen4x8||2 x Gen4x8||2 x Gen4x8||4 x Gen4x8||4 x Gen4x8||4 x Gen4x8||1 x Gen4x8||1 x Gen4x8||2 x Gen4x8||2 x Gen4x8|
|Multirate Ethernet MAC||1||2||2||4||2||4||1||2||2||2|
The Xilinx Vitis™ unified software platform provides comprehensive tools, libraries that use hardware-acceleration technology from the cloud to edge. The platform provides an efficient, convenient, and unified software environment across device nodes. As a proud member of the open source community, the Vitis unified software platform is entirely free and open source.
Be the first to experience the Versal ACAP architecture, built from the ground-up to be natively software programmable. Through a host of tools, software, libraries, IP, middleware, and frameworks, ACAPs enable dynamically customizable accelerated computing solutions through industry-standard design flows. The Versal Prime series VMK180 evaluation kit has everything you need to jump-start your design on Versal ACAPs.