Introducing the Virtex UltraScale+ VU57P FPGA


Where Fast Data Meets Fast Memory

Innovative Integration of 58G PAM4 Transceivers and 16G HBM

vu57p-chip

Overview

20X Higher Memory Bandwidth and
75% Lower Power

  • Highest memory bandwidth per watt
  • Integrated HBM controller and AXI port switch for contiguous memory access to the entire 16G HBM

2X Faster Data Movement and
Latest Optical Standards

  • 58G PAM4 transceivers double transmission rate
  • Supports the latest optical standards:
    QSFP-DD and OSFP

Simplified Design for
Faster Time-to-Market

  • Faster design and timing closure
  • Integrated high-speed connectivity:
    100G Ethernet w/ RS-FEC, 150G Interlaken, PCIe® Gen4

Applications

Many of today’s applications demand more memory bandwidth and capacity than discrete commodity memories, like DDR4, can deliver. The Virtex® UltraScale+™ VU57P FPGA allows users to integrate power efficient compute capabilities with highest memory bandwidth and capacity while leveraging 58G PAM4 transceivers to double the data transmission rate. Virtex UltraScale+ VU57P FPGAs are ideal for latency-sensitive workloads that need to process large data sets with high throughput.

 

Compute Acceleration

Compute Acceleration

Pre-processing data is critical to achieve the best results from fixed-function compute devices. With the adaptable logic and 460GB/s of HBM bandwidth, the Virtex UltraScale+ VU57P FPGA can select, transform, and groom data to optimize inputs for the target accelerator. Equipped with high-speed 58G PAM4 transceivers, the Virtex UltraScale+ VU57P FPGA maximizes throughput and system performance.


Compute Acceleration

Next-Generation Firewall

Network operators desire uninterrupted, robust network availability, and intelligent management while securing data and avoiding malware attacks on enterprise networks. The Virtex UltraScale+ VU57P FPGA enables unmatched scalability for implementing multi-layer network security from VPNs to TLS level with 10s of millions of concurrent sessions with customized policies and controls while maintaining line-rate throughput and low latency. With 16G HBM, next-generation security appliances can manage multiple look-up tables while buffering and reordering network flows. 58G PAM4 transceivers enable support for the latest optical standards for scalability to higher throughput needed by next-generation firewalls.


Compute Acceleration

Switches and Routers with QoS

Virtex UltraScale+ VU57P FPGA with 16G HBM enables an Nx400G/200G/100G/50G switch with a 400G datapath pipeline and traffic manager for QoS. 58G PAM4 transceivers enable connectivity to the latest optical standards and double the transmission rate to/from the primary switching function. Packet classification, switch and route look-up tables, and traffic manager queues for the switch are implemented in HBM. With power/thermal constraints​ in mind, Virtex UltraScale+ VU57P FPGA-based switches and routers can implement a less complex cooling mechanism with higher performance through lidless package options, which is critical to data center and telco infrastructure.