Programmable
Heterogeneous MPSoC
Zynq UltraScale+ MPSoC Product Advantages
Zynq® UltraScale+™ MPSoC devices provide 64-bit processor scalability while combining real-time control with soft and hard engines for graphics, video, waveform, and packet processing. Built on a common real-time processor and programmable logic equipped platform, three distinct variants include dual application processor (CG) devices, quad application processor and GPU (EG) devices, and video codec (EV) devices, creating unlimited possibilities for applications such as 5G Wireless, next generation ADAS, and Industrial Internet-of-Things.
For information on Zynq UltraScale+ RFSoCs integrating multi-giga-sample RF data converters and soft-decision forward error correction (SD-FEC) into an programmable MPSoC architecture, click here.
| Block Diagram | Description |
Applications |
|---|---|---|
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Zynq UltraScale+ CG CG devices feature a heterogeneous processing system comprised of a dual-core Cortex™-A53 and a dual-core Cortex™-R5 real-time processing unit. Mated with 16nm FinFET+ programmable logic, these devices are optimized for industrial motor control, sensor fusion, and industrial IoT applications. CG devices deliver exceptional performance-per-watt while providing future proofing through package migration within the Zynq UltraScale+ Portfolio. |
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Zynq UltraScale+ EG EG devices feature a quad-core ARM® Cortex-A53 platform running up to 1.5GHz. Combined with dual-core Cortex-R5 real-time processors, a Mali-400 MP2 graphics processing unit, and 16nm FinFET+ programmable logic, EG devices have the specialized processing elements needed to excel in next-generation wired and 5G wireless infrastructure, cloud computing, and Aerospace and Defense applications. |
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Zynq UltraScale+ EV EV devices build on the powerful EG platform and add an integrated H.264 / H.265 video codec capable of simultaneous encode and decode up to 4Kx2K (60fps). Designed with high definition video in mind, EV devices are ideal for multimedia, automotive ADAS, surveillance, and other embedded vision applications. |
| Value | Features |
|---|---|
| Smarter & Optimized & Most Secure Solution |
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| Unmatched Integration, Performance, and Power |
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| Proven Productivity |
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Processing System Features
| CG Devices |
EG Devices |
EV Devices |
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|---|---|---|---|
| Application Processing Unit | Dual-core ARM® Cortex™-A53 | Quad-core ARM Cortex-A53 | Quad-core ARM Cortex-A53 |
| Real-Time Processing Unit | Dual-core ARM Cortex-R5 | Dual-core ARM Cortex-R5 | Dual-core ARM Cortex-R5 |
| Graphics Processing Unit | - |
ARM Mali™-400 MP2 | ARM Mali-400 MP2 |
| Video Codec Unit | - | - | Supports H.264/H.265 |
| Dynamic Memory Interface | DDR4, LPDDR4, DDR3, DDR3L, LPDDR3 | ||
| High-Speed Peripherals | PCIe® Gen2, USB3.0, SATA 3.1, DisplayPort, Gigabit Ethernet | ||
| ZU2CG | ZU3CG | ZU4CG | ZU5CG | ZU6CG | ZU7CG | ZU9CG | |
| System Logic Cells (K) | 103 | 154 | 192 | 256 | 469 | 504 | 600 |
| Memory (Mb) | 5.3 | 7.6 | 18.5 | 23.1 | 25.1 | 38.0 | 32.1 |
| DSP Slices | 240 | 360 | 728 | 1,248 | 1,973 | 1,728 | 2,520 |
| Maximum I/O Pins | 252 | 252 | 252 | 252 | 328 | 464 | 328 |
| ZU2EG | ZU3EG | ZU4EG | ZU5EG | ZU6EG | ZU7EG | ZU9EG | ZU11EG | ZU15EG | ZU17EG | ZU19EG | |
| System Logic Cells (K) | 103 | 154 | 192 | 256 | 469 | 504 | 600 | 653 | 747 | 926 | 1,143 |
| Memory (Mb) | 5.3 | 7.6 | 18.5 | 23.1 | 25.1 | 38.0 | 32.1 | 43.6 | 57.7 | 56.7 | 70.6 |
| DSP Slices | 240 | 360 | 728 | 1,248 | 1,973 | 1,728 | 2,520 | 2,928 | 3,528 | 1,590 | 1,968 |
| Maximum I/O Pins | 252 | 252 | 252 | 252 | 328 | 464 | 328 | 512 | 328 | 668 | 668 |
| ZU4EV | ZU5EV | ZU7EV | |
| System Logic Cells (K) | 192 | 256 | 504 |
| Memory (Mb) | 18.5 | 23.1 | 38.0 |
| DSP Slices | 728 | 1,248 | 1,728 |
| Video Code Unit (VCU) | 1 | 1 | 1 |
| Maximum I/O Pins | 252 | 252 | 464 |
Developer Zone
For SoC designers looking for a familiar, yet powerful development environment to shorten design time, and ensure scalability and re-use, Xilinx and its third party ecosystem provide a comprehensive suite of tools and methodologies to address bottlenecks in hardware and embedded development, system-level integration, and implementation.
