2. Support
  3. AR# 1017: Designing with the XC5200 family using synthesis
  4. AR# 10171: Virtex/Virtex-E/Spartan-IIE- How can I initialize distributed RAM or ROM?

AR# 10171

Virtex/Virtex-E/Spartan-IIE- How can I initialize distributed RAM or ROM?

Description


General Description:

How do I initialize distributed RAM/ROMs for Virtex and Spartan Family Devices?

Solution


The only ways to initialize distributed RAM/ROM in Virtex are to use the INIT attribute, or to create the RAM/ROM in CORE Generator and use the COE file.



The INIT attribute can be attached during RAM/ROM instantiation (in the HDL code or in the schematic), or by using the UCF file.



The INIT attribute is discussed in "Attributes and Carry Logic" section of the Libraries Guide, located online at:

http://toolbox.xilinx.com/docsan/3_1i/
-> Libraries Guide -> Chapter 12 -> Attribute/Logical Constraints.



For information on the COE file used for CORE Generator, please see (Xilinx Answer 9697).



For information on initializing RAM/ROM in an HDL code, please see the following Answer Records:



- (Xilinx Answer 4595) for Design Compiler

- (Xilinx Answer 2104) for Synplify
AR# 10171
Date 07/27/2010
Status Archive
Type General Article