UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 10644

3.3i Foundation ISE Project Importer - I/O macros are not recognized by FPGA Express.

Description

Keywords: ISE, Project Navigator, Importer

Urgency: Standard

General Description:
On designs imported from the Foundation schematic to ISE, Synopsys is
inserting IBUFs in front of IFD symbols for Virtex-derived families. This is
causing the implementation tools to error out.

This does not appear to happen for 4K families.

Solution

Solution 1:
In Foundation Schematic, change the IFD to an FD, and add an IBUF on
the data input to the FD. Then, set the "Pack I/O Registers/Latches Into
IOBs" option to "For Inputs And Outputs" under the Map - Properties of ISE.

Solution 2:
"Insert I/O Buffers" must be de-selected in FPGA Express, and all IBUFs and
OBUFs must be instantiated.
AR# 10644
Date Created 12/14/2000
Last Updated 10/21/2002
Status Archive
Type General Article