AR# 11209

CPLD XC9500/XL JTAG - What are the Test Access Port (TAP) timing characteristics?


General Description:

What are the timing characteristics for the 9500/XL JTAG TAP controller?


9500/XL timing for the JTAG Test Access Port (TAP):

Tms min. set-up with respect to Tck: 10ns

Tms min. hold with respect to Tck: 10ns

Max Tck frequency: 10MHz

For more information on the TAP controller timing, please refer to

(Xilinx XAPP 070): Using In-System Programmability in Boundary-Scan Systems

AR# 11209
Date 12/15/2012
Status Archive
Type General Article