2. Support
  3. AR# 1145: 3.1i Design Manager - "Display Xilinx Watermark ...." setting may cause display issues on certain systems
  4. AR# 11456: 3.3i Foundation - Synopsys timing constraints are exported by default.

AR# 11456

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3.3i Foundation - Synopsys timing constraints are exported by default.

Description

Keywords: Foundation, Express, constraints, NCF

Urgency: Standard

General Description:
In FPGA Express 3.5.1, timing constraints are exported by default. When Service Pack 8 is installed, the constraints are no longer exported by default.

Solution

This problem is fixed in the latest 3.1i Service Pack, available at:
http://support.xilinx.com/support/techsup/sw_updates.
The first service pack containing the fix is 3.1i Service Pack 8.
AR# 11456
Date 04/20/2007
Status Archive
Type General Article
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