3.1i Virtex-II Speed Files - Incorrect delay on differential buffers
Description
Keywords: time_sim, edn, LVDS, IBUFDS
Urgency: Standard
General Description: The speed files for the Virtex-II are not reporting symmetrical delays for both pairs of differential input pins. (This information is reported in the time_sim file.)
An instance of this behavior is illustrated in the following snippet from a time_sim.edn. (Note that "portInstance IB" has no values.):