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AR# 12061

4.1i ECS - Lower-case netlister names result in module, pin, and net name mismatches.


Keywords: HDL, Verilog, ECS, instantiate, case, upper, lower

Urgency: Standard

General Description:
The ECS Verilog netlister writes all module, pin, and net names in lower-case letters. This results in module, pin, and net name mismatches.


To avoid this problem, use lower-case letters to name all HDL modules, pins, and nets.
AR# 12061
Date 01/08/2006
Status Archive
Type General Article
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