AR# 12072

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4.1i Project Navigator - VHDL "generate" statements are not supported for all processes in Project Navigator

Description

Keywords: generate, VHDL, process, code

Urgency: Standard

General Description:
Processes such as "Create Schematic Symbol", "View VHDL Instantiation Template", and "New Source -> VHDL Testbench" fail because the VHDL "generate" statements are not supported by VHDL Analyzer.

Solution

The "generate" statement must be removed from the code in order to use these processes.

This issue was resolved in the 5.1i software release.
AR# 12072
Date 08/11/2003
Status Archive
Type General Article
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