AR# 12899


4.1i CORE Generator - DSP 32-Point FFT v2.0 compilation with VCSI causes warnings and errors


When I compile the 32-Point FFT Verilog model with VCS or VCSI, a number of warnings and errors similar to the following are reported:

Warning-[TMPO] Too many parameter overrides

"/products/verilog/src/XilinxCoreLib/VFFT32_V2_0.v ", 5417: C_COMPARE_V2_0 #("\000", ...


Currently, v2.0 of the 32-Point FFT will not compile with VCS or VCSI.

The only work-around at this time is to use the EDIF implementation netlist and to use a post-NGDBuild Verilog netlist for the macro in simulation.

Please refer to (Xilinx Answer 8065) for more information.
AR# 12899
Date 07/28/2010
Status Archive
Type General Article
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