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AR# 12954

9.1i PAR - What effect does the USELOWSKEWLINES constraint have on various device families?

Description

What effect does the USELOWSKEWLINES constraint have on various device families?

Solution

The USELOWSKEWLINES constraint is honored by the Virtex, Virtex-E, Spartan-II, and Virtex-II device families. 

 

For Virtex, Virtex-E, Spartan-II: 

USELOWSKEWLINES causes PAR to put the clock net on the backbone routing resources. If this cannot be done, PAR issues an error. 

 

For Virtex-II: 

USELOWSKEWLINES causes PAR to use a template to route nets in a particular way that reduces skew. If this cannot be done, PAR will not issue an error or warning.

AR# 12954
Date Created 08/29/2007
Last Updated 05/14/2014
Status Archive
Type General Article