Virtex-II ES devices require a manual reset of the DCM after configuration has successfully completed (DONE has gone HIGH). This is necessary to ensure proper LOCKING behavior.
Both Production and ES devices require DCM reset after configuration if the DCM is configured with external feedback. See (Xilinx Answer 14425).
DCM reset on Virtex-II ES devices:
1. After the DONE signal asserts, wait at least 0.5 seconds before resetting the DCM. If the device is operating at 0 degrees Celsius, wait 5 seconds (after DONE goes HIGH) before resetting the DCM. (The requirement to wait for 5 seconds after configuration completes is for ES devices only.)
2. The RESET pulse should last longer than 2 ns and should be less than 100 us. The RESET should not last very long so as to prevent a sudden change in the power supply load when it is released. (When the DCM is held in reset, the associated clock outputs will not toggle; hence, the load on the power supplies will be minimal.)
Once the reset is released, there might be a significant change in the load on the power supply. This is due to the change from "no activity" (no clock) to "full activity" (all clocks in the FPGA toggling). Unless the power supply is designed to handle this and stay within the suggested operational power supply specifications, the resulting power supply voltages may sag; this will cause a phase error, or even the loss of the LOCKED signal.
(NOTE: If the DCM is reset for longer than is recommended above, this will NOT damage the DCM or the FPGA. This is only a guideline to prevent power supply from drooping outside the operational specifications.)
3. Do not use the STARTUP_WAIT feature of the DCM. (ES devices only)
4. If a non-default configuration startup sequence is being specified, do not use the "LCK_cycle" option. (ES devices only)
For information regarding DCM Reset on Virtex-II devices with external feedback, please see (Xilinx Answer 14425).