We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 13222

4.1i ECS - "ERROR:XST: 1068 - <module_name>.vf Line x. Duplicate declarations of module <module_name>"


Keywords: 4.1, ECS, XST, 1068, duplicate, declaration, module, .vf

Urgency: Standard

General Description:
I am performing a schematic flow using XST-Verilog. During the conversion from schematics to Verilog, a duplication of module declarations occurs, with different schematics using the same component. During synthesis, the following error message is reported:

"ERROR:XST:1068 - <module_name>.vf Line x. Duplicate declarations of module <module_name>"


To work around this problem, open the .vf files that are created and edit them manually, changing the duplicate module names to a name that has not been used yet. (For example, add an "A" to end of the module name.)

Alternately, you may remove the module declarations from all but one file.

This problem was fixed in ECS version 4.2i.
AR# 13222
Date 08/11/2003
Status Archive
Type General Article